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![Mapping technique [11].](profile/Mamun-Bin-Ibne-Reaz/publication/283736494/figure/fig1/AS:393508834824206@1470831225814/Mapping-technique-11.png)
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![Table 1 . Power dissipation of Sharif et al. and prior technique [11].](profile/Mamun-Bin-Ibne-Reaz/publication/283736494/figure/tbl1/AS:668372161265684@1536363749463/Power-dissipation-of-Sharif-et-al-and-prior-technique-11_Q320.jpg)
![Fig. 2. Mapping technique [11].](profile/Mamun-Bin-Ibne-Reaz/publication/283736494/figure/fig1/AS:393508834824206@1470831225814/Mapping-technique-11_Q320.jpg)
![Table 2 . Power savings with MTCMOS by Rani et al. [28].](profile/Mamun-Bin-Ibne-Reaz/publication/283736494/figure/tbl2/AS:668372161269768@1536363749497/Power-savings-with-MTCMOS-by-Rani-et-al-28_Q320.jpg)
Total power dissipation in CMOS circuits has become a huge challenging in current semiconductor industry due to the leakage current and the leakage power. The exponential growth of both static and dynamic power dissipations in any CMOS process technology option has increased the cost and efficiency of the system. Technology options are used for the...
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Due to the recent technology trends all the electronic markets are based on reliable and speed performance devices. By developing semiconductor industry, all the passive and active components are assembled on a single chip named as an Integrated chip (IC). Developing this type of technology made all the electronic devices becomes smarter and reliab...
DRAM chip industry became one of the most researchers' interests nowadays for its simple structure and low power consumption. As the density of DRAM chips increased, many problems occurred that affected the DRAM performance. One of these problems is the increase in the bit-line parasitic capacitance values. These large values slow down the reading...
Citations
... In 2011, CMOS technology was adopted by 99% of IC chips, including most digital, analog, and mixed-signal ICs. VLSI digital and mixed-signal designs are currently dominated by CMOS technology [1]. ...
... A dimensional illustration of MOSFET[1] ...
Wide-bandgap materials, exemplified by gallium nitride (GaN), are poised to elevate electronic performance to new heights. This paper is focus on the third-generation semiconductor which is considered as the most promising semiconductor. The first section will discuss the fundamentals of CMOS and HEMT, including their construction, operation, benefits, and properties. The two are next be compared, and it is revealed that although GaN has some limitations on its cost and manufacture, it also having higher energy gap, compact size, higher efficiency, lower switching losses. Meeting the increasingly rigorous requirements associated with high power and high-density applications requires the use of these advantages. Then, using examples from the aerospace, mobile phone chargers, and LiDAR fields, applications of GaN HEMTs are discussed. The issues and prospects for third generation semiconductors are finally went over. It shows significant potential for energy efficiency benefits in infrastructure, and it is intriguing to see how the new semiconductor generation develops in the next few years.
... There are two components in dynamic power consumption -switching power P switching due to charging and discharging of load capacitance, and short-circuit power P sc due to nonzero input waveforms rise and fall time. These components are related mathematically as [60][61][62]: ...
The energy efficiency of IoT nodes remains the dominant factor for effective IoT solutions that will meet the challenges of the 21st century, especially in the drive towards a carbon-neutral world through net-zero targets. Microprocessors/microcontrollers are devices that perform entire operations of IoT devices. Therefore, the power and energy consumption of these processors directly reflects the power consumed by the IoT devices they drive. An accurate estimation of the power and energy consumption of the processors is vital for the development of energy-efficient IoT solutions because IoT devices are designed to operate in remote locations for long periods without human intervention. It is against this backdrop that this paper which is expected to serve as a guide for researches and IoT node/application developers in selecting the best technique for an IoT use-case, presents a review of processor power and energy consumption estimation techniques starting from the lowest level of abstraction to the highest level of abstraction. The review involves a detailed discussion of estimation technique methodologies for an abstraction level, and where applicable, generalized methodologies which cover the most approach used for an abstraction level are covered. The existence of overlaps and the impact of processor duty cycles on the techniques were discussed. A comparison of the strengths and weaknesses of each technique was made, from where register-transfer level and instruction level techniques are shown to be resilient against errors that occur from poor input signal conditioning. Future directions for the development of estimation techniques are also presented as recommendation.
... The key challenge for a design engineer in a nanometer regime is reducing power consumption [1][2][3]. Due to continuous scaling of device dimensions and supply voltage, various undesirable Short Channel Effects (SCEs) have affected the device performance [4,5]. The supply voltage scaling has not followed the same trend as the other parameters due to the 60 mV/dec subthreshold swing limitation in conventional devices. ...
... The input voltage where the first-order harmonic power is equal to the third-order harmonic power is defined as (Input Intercept Point-3) IIP 3 . The input voltage where the firstand third-order inter-modulation powers are equal is termed (Inter-modulation distortion -3) IMD 3 . ...
The negative capacitance effect on MOS transistors has lately gained lot of momentum due to the use of ferroelectric material in the gate. They have attracted much attention from researchers due to their improved performance at low power supplies. This work presents the simulation and analysis of NC-CyJLT for analog/RF, linearity distortion, and thermal stability. The analytical modeling of surface potential using the parabolic approximation and Landau-Khalatnikov (L-K) equation has been performed and compared with simulation results. This device combines the advantages of negative capacitance, surrounding gate, and junction-less techniques together, resulting in improved performance and reliability. Analog/RF and linearity distortion analysis of NC-CyJLT have been compared with conventional CyJLT to study the effect of negative capacitance. Further, thermal analysis of NC-CyJLT has been performed to study its operation over a wide range of temperatures. Through analysis, it has been observed that the use of ferroelectric material in the gate stack improves electrostatic, analog/RF performance in comparison to the conventional CyJLT. The simulation results also reveal that the NC-CyJLT device has reduced transconductance derivatives (gm2 and gm3), intermodulation distortion 3 (IMD3), and increased voltages intercept points (VIP2 and VIP3). The input intercept point 3(IIP3) also increases, thus indicating improved linearity performance with reduced distortion. Thermal stability analysis suggests that NC-CyJLT's performance degrades with an increase in temperature beyond the Curie temperature of the ferroelectric material. Hence, the analysis and study of the NC-CyJLT device confirms that the device finds application in low power and high-density analog/RF circuits.
... In power electronics, silicon has been adopted as the mainstream technology as silicon diodes, power semiconductor switches over the past few decades. However, with the newly emerging technology of gallium nitride that has a wider bandgap, higher electron mobility, and better saturation electron drift velocity, it is promising that the implementation of gallium nitride will boost the functionality of semiconductor devices [11,12]. The properties comparison between the three different wide bandgap devices is shown in Table 1. ...
This paper presents a comprehensive study on the switching effects of wide bandgap devices and the importance of power electronics in an aircraft application. Silicon (Si), silicon carbide (SiC), and gallium nitride (GaN) are wide bandgap devices that act as a power electronic switch in the AC-DC converter for More Electric Aircraft (MEA) applications. Therefore, it is important to observe their converting efficiency to identify the most suitable wide bandgap device among three devices for AC-DC converters in aircraft applications to provide high efficiency and high-power density. In this study, the characteristics of Si, SIC, and GaN devices are simulated using PSIM software. Also, this paper presents the performance of the Vienna rectifier for aircraft application. The Vienna rectifier using Si, SiC, and GaN devices are simulated using PSIM software for aircraft application. GaN with Vienna rectifier provides better performance than Si and SiC devices for aircraft applications among the three devices. It gives high efficiency, high power density, low input current THD to meet IEEE-519 standard, and high-power factor at mains.
... ADC is currently adopted in many application fields to improve the digital system, which achieves superior performance concerning analog solutions. As reported by [5], [6], the impact of leakage power to the total power consumption is steadily increasing due to the scaling down of CMOS technology. Thus, the fundamental principle of low power is to start with less leakage current. ...
Comparator is one of the main blocks that play a vital task in the performance of analog to digital converters (ADC) in all modern technology devices. High-speed devices with low voltage and low power are considered essential for industrial applications. The design of a low-power comparator with high speed is required to accomplish the requirements mostly in electronic devices that are necessary for high-speed ADCs. However, a high-speed device that leads the scaling down of CMOS process technology will consume more power. Thus, power reduction techniques such as multi-threshold super cut-off stack (MTSCStack), dual-threshold transistor stacking (DTTS), a bulk-driven, and a bulk-driven differential pair were studied in this work. This study aims to find and build the combination of these techniques to produce a comparator that can operate in low power without compromising existing performance using the 0.13-µm CMOS process. A comparator with a combination of MTSCStack, DTTS, and NMOS bulk-driven differential pair shows the most promising result of 6.29 µW for static power, 17.15 µW for dynamic power, and 23.44 µW for total power.
... where a is the switching activity factor, C is the capacitance measured in farad (F), and f is the clock frequency measured in hertz (Hz). Mostly, the activity factor is a = 0.5 [47]. (Tables 5-11), is used for RCPKC power consumption evaluation in Section 8.2. ...
... The private key components, ( f , g), meet (8), (9), (33), (34) and (52), where qLen, mgLen meet (38) and (43) The public key component, h, is defined by (10). Message, m, meets (33), and random integer, r, is selected from the range defined in (46), (47) and (50). Encryption and decryption follow (13), (14) and (16), respectively (see Sections 3. 3.1 and 3.3.2). ...
... output : e ∈ Z q is the ciphertext. begin , µ), r = genr(ρ), s = r · h mod q, and ω = (m||µ) ⊕ H(s) //genr is a //function generating correct r according to (46), (47), (50) and (51) 1. a = f · e mod q //according to (14), 2. ω = F g · a mod g //according to (16) 3. s = e − ω mod q 4. m||µ = ω ⊕ H(s); r = genr(G(m||µ)). 5. if r · h = s mod q, then output m, else, output Reject. ...
Wireless sensor networks (WSNs) are the core of the Internet of Things and require cryptographic protection. Cryptographic methods for WSN should be fast and consume low power as these networks rely on battery-powered devices and microcontrollers. NTRU, the fastest and secure public key cryptosystem, uses high degree, N, polynomials and is susceptible to the lattice basis reduction attack (LBRA). Congruential public key cryptosystem (CPKC), proposed by the NTRU authors, works on integers modulo q and is easily attackable by LBRA since it uses small numbers for the sake of the correct decryption. Herein, RCPKC, a random congruential public key cryptosystem working on degree N = 0 polynomials modulo q, is proposed, such that the norm of a two-dimensional vector formed by its private key is greater than √ q. RCPKC works as NTRU, and it is a secure version of insecure CPKC. RCPKC specifies a range from which the random numbers shall be selected, and it provides correct decryption for valid users and incorrect decryption for an attacker using LBRA by Gaussian lattice reduction. RCPKC asymmetric encryption padding (RAEP), similar to its NTRU analog, NAEP, is IND-CCA2 secure. Due to the use of big numbers instead of high degree polynomials, RCPKC is about 27 times faster in encryption and decryption than NTRU. Furthermore, RCPKC is more than three times faster than the most effective known NTRU variant, BQTRU. Compared to NTRU, RCPKC reduces energy consumption at least thirty times, which allows increasing the lifetime of unattended WSNs more than thirty times.
... where a is the switching activity factor, C is the capacitance measured in farad (F), and f is the clock frequency measured in hertz (Hz). Mostly, the activity factor is a = 0.5 [47]. MSP430FR5969, a Texas Instruments microcontroller with capacitance C = 20pF [48, ...
Wireless Sensor Networks (WSN) are the core of Internet of Things and require cryptographic protection due to the increase number of attacks. Cryptographic methods for WSN should be fast and consume low power as these networks consist of battery-powered devices and constrained microcontrollers. NTRU, the fastest and secure public key cryptosystem, uses high degree polynomials, and is susceptible to the lattice basis reduction attack (LBRA). CPKC, proposed by NTRU authors, works on integers modulo $q$ and is easily attackable by LBRA since it uses small numbers for the sake of the correct decryption. Herein, RCPKC, a random congruential public key cryptosystem working on integers modulo $q$ is proposed, such that the norm of a two-dimensional vector formed by its private key is greater than $\sqrt{q}$. RCPKC works similar to NTRU, and it is a secure version of insecure CPKC. RCPKC specifies a range from which the random numbers shall be selected, and it provides correct decryption for valid users and incorrect decryption for an attacker using LBRA by Gaussian lattice reduction. Because of its resistance to LBRA, RCPKC is more secure. Simultaneously, due to the use of big numbers instead of high degree polynomials, RCPKC is about 24 (7) times faster in encryption (decryption) than NTRU. Also, RCPKC is more three times faster than the most effective known NTRU variant, BQTRU. Compared to NTRU, RCPKC reduces energy consumption at least seven times that allows increasing life-time of unattended WSN more than seven times.
... Subthreshold leakage current (ISUB) and gate tunneling leakage current(IG) are identified as key sources of leakage currents in all transistor. Subthreshold leakage current transpires only in turned-off transistors [24], [25]. For an individual device, leakage current can be calculated by equation (6). ...
... They also seriously lead to intermittent tripping and rise in voltage on accessible conductive parts become dangerous to living beings resulting in current shock to individuals if no sufficient grounding. In the Oil & Gas sector, leakage current potential to power losses, power dissipation, equipment tripping, and power supply disturbance [1][2][3][4]. Locating the root cause of leakage current is difficult. A common practice is by clamp meter. ...
span>An alternating current leakage can happen in electrical installation such as switchgear panel. If it’s not being detected earlier and address properly, it might lead to unintended incident or accident such as fire, electric shock, and power supply trip. Occasionally, if it appears, tracing its root cause can be difficult. The conventional method is by isolating one by one of the electrical loads with aids of multimeter and clamp meter. Unfortunately, this conventional method could be a tedious job for installations involved in numbers of electrical panels. Therefore, an alternative method is deeming necessary. This paper describes research works on Infrared Thermography (IRT) as a new method in detecting leakage current as aids in resolving related electrical problems. The scope of study mingling around to determine IRT’s suitable parameters that represent the identification of leakage current, derive new mathematical equation correlating leakage current to IRT and conduct experiment accordingly. Two new equations derived which are leakage current relationship to thermogram and infrared net radiation power. The results of experiment adherence to the hypothesis drawn. Consequently, helps to realize predictive maintenance concept by detecting the root cause of leakage current ahead its triggering points of unintended incident and accident.</span
... Leakage power is actually consumed when the device is both static and switching, but generally the main concern with leakage power is during inactive state of device. This is the power which should be concentrated more in deep submicron design of device as it exponentially depends on size of the device [5]. Fig.1 shows both dynamic power and leakage power consumption that occur in CMOS circuits. ...
