Figure 1 - uploaded by Will Guin
Content may be subject to copyright.
Layup configurations considered for [±θ] layup evaluations.

Layup configurations considered for [±θ] layup evaluations.

Source publication
Technical Report
Full-text available
Tailorability is one of the primary benefits offered by the use of polymer matrix composites (PMCs). However, real-world constraints often dictate that this tailorability is difficult to fully realize in practice. In flight hardware applications where components must be rigorously qualified, the prospect of tailoring a composite structure entails s...

Contexts in source publication

Context 1
... properties and Tsai-Wu first ply failure (FPF) strengths were determined for each. Figures 1 and 2 show these layup configurations and accompanying laminate-level property evaluations. As shown in Figure 2, classical lamination theory (CLT) and the Tsai-Wu failure criterion predict that balance and symmetry can have a significant effect on laminate-level properties in [±θ] layups. ...
Context 2
... plots for each of the adapter configurations considered in this study are shown in this appendix (Figures 9-12). Note that in these figures, only the composite sandwich acreage (adapter shell structure) is shown for clarity. ...
Context 3
... that in these figures, only the composite sandwich acreage (adapter shell structure) is shown for clarity. Furthermore, for Figures 10 and 12, in linear buckling analyses in Abaqus, mode shapes do not represent actual magnitudes of deformation at critical buckling load (displacements are normalized so that the maximum individual displacement component is 1). ...
Context 4
... a thin shell axisymmetric structure with an applied axial load P and overturning moment M, such as the conical frustum shell shown in Figure 13. where shell thickness is defined by t and is considerably smaller than the radius of the axisymmetric structure (threshold for 'thin' is commonly taken as t/R nominal < 0.1). ...

Similar publications

Article
Full-text available
Modern parallel programming models help programmers to easily convert serial programs into parallel ones, by creating a set of tasks and their dependencies to define execution order of them. To increase the efficiency of running these multi task programs, Hardware-Accelerators were created to take the lift of the Operating System kernel from schedu...