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5. H.264 decoder block diagram  

5. H.264 decoder block diagram  

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We propose an elastic pipeline architecture that can apply dynamic voltage scaling (DVS) to a dedicated hardware, and implement the elastic pipeline to a portable H.264/AVC decoder LSI with embedded frame buffer SRAM. A supply voltage and operating frequency are decreased by a feedback-type voltage/frequency control algorithm. In a portable H.264/A...

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Citations

... ST has also been applied to embedded video decoding applications like H.264 decoders, as shown by Pal [23] or Sakata [24]. In the former, the concept of ST was applied to dynamic core allocation on embedded multicore platforms, taking advantage of the ST to shut off unneeded cores. ...
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