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H-spice Simulation of 16-bit ripple carry adder with 50 input vector pairs in 90nm bulk CMOS PTM at V dd = 1.4 volts and 1.45 GHz clock frequency.
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A processor executes a computing job in a certain number of clock cycles. The clock frequency determines the time that the job will take. Another parameter, cycle efficiency or cycles per joule, determines how much energy the job will consume. The execution time measures performance and, in combination with energy dissipation, influences power, the...
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... of those, 50 vector pairs were selected such that 16 consume average power, 17 consume above average power including the peak power vector pair and 17 consume below average power including the minimum power vector pair. Figure 2 shows the power profiles of 50 selected vector pairs when they were embedded in the set of 1,000 vectors and then re-simulated as 100 standalone vectors. ...
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Moore's law states that the number of transistors that can be most economically placed on an integrated circuit will double approximately every two years. The law has often been subjected to the following criticism: while it boldly states the blessing of tech-nology scaling, it fails to expose its bane. A direct consequence of Moore's law is that "...
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Moore's law states that the number of transistors that can be most economically placed on an integrated circuit will double approximately every two years. The law has often been subjected to the following criticism: while it boldly states the blessing of tech-nology scaling, it fails to expose its bane. A direct consequence of Moore's law is that "the power density of the integrated circuit increases exponentially with every technology generation". This implicit trend has arguably brought about some of the most important changes in electronic and computer designs. In the next two decades, diminishing transistor size, speed scaling and practical energy limit will create new challenges for continued performance scaling. As a result, the frequency of operations will increase slowly, with energy being the key limiter of performance, forcing designs to use large-scale parallelism, heterogeneous cores, and accelerators to achieve performance and energy efficiency. Energy and performance are important aspects of microprocessors and their verification and management require, measurement, estimation and analysis, and these aspects are discussed through this research. A processor executes a computing job in a certain number of clock cycles. The clock frequency determines the time that the job will take. Another parameter, cycle efficiency or cycles per joule, determines how much energy the job will consume. The execution time measures performance and, in combination with energy dissipation, influences power, thermal behavior, power supply noise and battery life. We describe a method for power management of a processor. To show management of performance and energy, we study several Intel processors from 45 nm, 32 nm and 22 nm technology nodes for both thermal design power (TDP) and peak power. They are characterized for two different predictive technology models: Bulk CMOS and High-K metal Gate, which are available for analysis in H-spice simulation. Our analysis establishes correlation between the simulation data for an adder circuit and the processor data sheet, and then estimates operating frequency and cycle efficiency as functions of the supply voltage. This data is useful in managing the operational characteristics of processors, especially those used in mobile or remote systems where both execution time and energy are important. We illustrate how this information is utilized in managing the highest performance including turbo (over-clocking), lowest energy, and all in-between operating modes.
An Intel processor in 32 nm bulk CMOS technology is used as an illustrative example. First, we characterize the technology by H-spice [4] simulation of a ripple carry adder for critical path delay, dynamic energy and static power at a wide range of supply voltages. The adder data is then scaled based on the clock frequency, supply voltage, thermal design power (TDP) and other specifications of the processor. To optimize the time and energy performances, voltage and clock frequency are determined, showing 28% reduction in both execution time and energy dissipation.
