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General block diagram showing the structure of high accuracy DACs based on the combination of binary-weighted and thermometer-encoded sections [10].
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![Figure 2. Current source cell topologies: (a) basic; (b) cascoded [15].](profile/Eulalia-Balestrieri/publication/228569717/figure/fig1/AS:669430128336898@1536615988330/Current-source-cell-topologies-a-basic-b-cascoded-15_Q320.jpg)
In the last years the technology improvement of Digital-to-Analog Converters (DACs) has extended the use of digital techniques in a multitude of applications. Consequently, there is an increasing attention to DAC topics, from researchers and manufacturers. The paper is aimed at providing a metrological overview and the leading trends of the researc...
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... methods have been proposed to minimize the number of input codes aimed at testing both specific device families [22] and basic DAC schemes [23,24]. A more general approach is proposed and justified in [10]. This approach is based on a high-level model that takes advantage of the basic structural features common to most high-performance DACs (Fig. 3), thus enabling a major reduction in the total number of input test vectors. The efficiency improvement resulting from this procedure not only decreases the overall testing time, but it also promotes the design of both inexpensive Built-In Self-Test (BIST) architectures and digital self-calibration ...
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... The evaluation of the integral nonlinearity of DACs requires, in fact, the measurement of all DACs output voltage levels, which is carried out by means of ADCs that largely exceed the resolution of the DAC under test (i.e. high resolution ADCs such as dual slope ADCs), but are low speed systems and therefore involve a very long test duration [3,[7][8][9][10]. ...
The dynamic characterization of digital to analog converters (DACs) is still an open issue, on whose criticality both the scientific and industrial community agree. At present, only a draft standard (IEEE P1658) has been proposed, which is currently being discussed. In the last years, in fact, several works have been presented in the literature, but at the moment none of them seems to be robust enough to be easily included in the standard. Most of the proposed method, which are well structured from a theoretical point of view, and yield very encouraging simulative results, seem to suffer from some problems in the practical implementation. Such problems basically depend on the accuracy of the instrumentation they need to be implemented. The paper presents a contribution in this direction, consisting in a method for the dynamic characterization of DAC that is capable of reconstructing and analyzing DAC output with an equivalent resolution much greater than that of DAC itself even though a low resolution data acquisition system is used. The method consists of four phases each of which is carefully described and discussed in the following: (i) generation of DAC output signal, (ii) signal conditioning by means of an analog filter and a differential amplifier, (iii) acquisition and reconstruction of signal generated by the DAC, and (iv) recognition of the codes associated with the generic acquired voltage value. The method is also implemented in a suitable measurement station through which several tests have been performed on actual DACs. The experimental results show the good performance of the proposed method, which can thus be considered as a useful contribution to the draft standard IEEE P1658.
... T HE THEORY of operation of digital-to-analog converters (DACs) and their main architectures have been well known since many years [1], [2], but the precise definition of parameters expressing DAC performance and the accurate report of methods for evaluating them have not been completely assessed [3]. Indeed, standard guidelines for terminology and test methods for DAC characterization are still at draft state [4]; thus, DAC manufacturers are, up to now, left free to document product specifications according to their own convenience [5]. ...
In this paper, the authors present a new practicable method and the related measurement station for digital-to-analog converters (DAC) characterization. The method relies on the accurate reconstruction of a sine-wave test signal generated by the DAC under test based on the simultaneous acquisitions of the signal attained by filtering the DAC output and the difference between the DAC output and the filter output. Thus, due to straightforward data processing, the signal generated by the DAC is gained with a resolution much better than the resolution (usually poor) of the analog-to-digital converter (ADC) exploited for the acquisition. The main feature of the method is the ease of implementation that requires only traditional electronics and actual measurement instrumentation. In this paper, the authors also suggest simple rules aimed at evaluating the resolution achievable by each guessed measurement station. To confirm the expected encouraging outcomes, experimental results obtained through a measurement station implemented by using a two-channel 8-bit digital scope and based on the presented method are discussed. In particular, signals generated by 12- and 14-bit DACs have been acquired and processed with the measurement station and reconstructed, with a resolution greater than 17 equivalent bits, due to the proposed method.
... The characterization of high resolution Digital-toAnalog converters is a challenge nowadays still open. The static characterization could be, in theory, fulfilled by means of high accuracy voltmeters even though the test duration [1][2][3][4] makes it not practicable. But, still more challenging is high resolution DAC dynamic characterization. ...
The paper deals with the implementation of a measurement station for the test of high resolution of Digital-to-Analog Converters (DACs). The basic idea relies on the employment of a differential amplifier that provides a signal related to the difference between the voltage generated by the DAC under test and a reference signal. To solve problems associated to synchronization, the reference signal is gained by treating the DAC output voltage through a narrow band filter. Thanks to the differential amplifier, the difference signal, which holds information about DAC non linearity, is hugely expanded and, thus, can be acquired by means of an Analog-to-Digital converter whose resolution is lower than that of the DAC under test.
... The interest in these devices is growing, both from the scientific and the industrial worlds. A large number of scientific papers has been published during the last years [1][2][3][4][5] and the Waveform Measurement and Analysis Technical Committee (TC-10) of the IEEE Instrumentation and Measurement Society started a project for publishing a new standard on DAC terminology and test methods [6]. Standardization plays an important role for the evaluation and comparison of existing devices that are made by different manufacturers in different parts of the world. ...
The paper analyzes a set of DAC time domain specifications including DAC settling time, rise time and fall time, glitch energy. Some useful comments are provided in order to highlight ambiguity in the mostly used definitions and new definitions are suggested when it is necessary
The characterization of high resolution Digital to Analog Converter (DAC) involves new problems caused by their high performance. This paper presents a new method for measuring the characteristics of high resolution DACs under dynamic condition. The main principle of the proposed method is the conversion of the DAC analog output voltage to a digital code. The one that is corresponding to the equality of the DAC output voltage and reference signal by using a fast comparator, a dithering DAC and an accurate dc voltmeter. The output of the comparator is used as the control signal to register the digital input code word of the DAC in a fast memory. After digital processing the registered record of digital code words is used to determine the Integral-nonlinearity (INL) and Differential-nonlinearity (DNL) of the DAC under test.
The precise Digital to Analog Converters (DAC) are the key parts of many electronic equipment and the improvements of their performance together with increasing resolution is challenging problem for testing. Proposed method provides DAC linearity testing under dynamic condition by comparison of the DAC output voltage with the reference signal using fast comparator and strobed latch registering DAC input code at the equality of voltages. The reference signal is the superposition of DC voltage and the dithering signal. Accuracy of DC measurement together with the linearity of dithering signal is responsible for the metrological traceability. The proposed data processing algorithm determine Integral non-linearity (INL) and Differential non-linearity (DNL) from recorded code words. Theoretical analysis and simulation included in paper affirm the performance of the proposed technique.
In the paper the problems that arise in the experimental evaluation of DACs dynamic parameters are discussed. Usually, a measurement station for DAC characterization provides the time evolution of the DAC output voltage. A fundamental issue deals, then, with the synchronization between the acquired voltages and the codes sequence at DAC input, in order to shape the DAC characteristic, which associates the output voltage to each input code. Therefore, a timing association procedure, able to furnish the transfer function of the DAC under test during the characterization stage is required.
In this paper DAC static parameter definitions are evaluated highlighting their differences and similarities. Great attention has been paid to the most commonly used specifications. As a result of this analysis a unique set of DAC specifications is proposed considering that each parameter has to be unambiguously defined and practically measurable.
This work analyzes the imperfections that characterize waveforms generated by means of DACs. The attention is mainly paid to horizontal quantization, which is due to the discrete nature of the waveform to be played. Also the effects of time-base jitter, which occur in DAC functioning, are investigated when combined to horizontal quantization. Further remarks are related to other minor effects such as those caused by vertical quantization, which is due to the limited resolution of any DAC.
Constant improvement in converter performance results in requirement of higher precision instrument at increasing sampling speed. Therefore, building digitizer directly using existing cutting edge ADC technology will not satisfy current and future DAC testing needs. Development of new test techniques could help to fill this technology gap. This paper explores signal cancellation technique and proposes a robust algorithm to optimize signal cancellation.
