Figure 6 - uploaded by Yuan-Hao Huang
Content may be subject to copyright.
Final adder architecture using Wallace tree addition. 

Final adder architecture using Wallace tree addition. 

Source publication
Article
Full-text available
This paper presents a low-cost and high-performance programmable digital finite impulse response (FIR) filter. The architecture employs the computation sharing algorithm to reduce the computation complexity. In the traditional computation sharing algorithm, critical path constraint on the output summation stage is a bottleneck, thus, the canonic-si...

Contexts in source publication

Context 1
... Adder : In the S&A, the Final Adder sums the five partial products and is the critical path in the architecture. Therefore, we improve the Final Adder by using Wallace tree and look-ahead adder structure, which is shown in Figure 6, in order to reduce delay in the critical path. In the our CSHM architecture, the sign bit of coefficient C is used to transform the sign of the Final Adder output, the other bits are used for transforming CSD_C. ...
Context 2
... the C [16] bit is '1' and X [16] bit is '0', the Sign _bit will be '1',so the Final Adder output will be converted to it's negative value by Final Adder. The sign bit transform architecture is easily realized using the XOR gate array show in Figure 6. ...

Similar publications

Article
Full-text available
Filters (analogue and digital) are used for com-bined signal separation and restoration of signals that have some distortion. Digital filters achieve better results, with limited accuracy depending on rounding errors in arithmetic employed. The design of a digital filter with finite impulse response (FIR) and the quantization coefficients to facili...
Article
Full-text available
Recently, design of sparse finite impulse response (FIR) digital filters has attracted much attention due to its ability to reduce the implementation cost. However, finding a filter with the fewest number of nonzero coefficients subject to prescribed frequency domain constraints is a rather difficult problem because of its non-convexity. In this pa...
Conference Paper
Full-text available
In this paper, two area-efficient two-dimensional (2-D) IIR filter architectures for 2-D transfer function with diagonal and four-fold rotational symmetries are proposed for image processing. For this purpose, two different intermediate transfer functions are applied and the corresponding two new filter architectures are obtained. Under satisfactor...
Conference Paper
Full-text available
This paper proposes the innovative methodologies for the robust and stable design of optimal stable digital infinite impulse response (IIR) filters using different mutation variants of hybrid differential evolution (HDE). A multivariable optimization is employed as the design criterion to obtain the optimal stable IIR filter that satisfies the diff...
Article
Full-text available
Regression analysis using orthogonal polynomials in the time domain is used to derive a digital filter with an infinite impulse response (IIR) that satisfies “maximally flat” design constraints near DC. The low-frequency phase, and high-frequency gain, may be adjusted for lead or lag compensation of plant dynamics. Simulated design examples are use...