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Excess gate-voltage noise power spectral density S vg (left axis) and the calculated effective density of traps D t (E f ) at ∼ 10 Hz as a function of temperature from 85 to 510 K.
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The temperature dependence of the low-frequency noise of 4H-silicon carbide (SiC) MOSFETs with nitrided oxides is reported over the temperature range 85-510 K. The 1/f noise decreases significantly with increasing measurement temperature. This decrease in noise results primarily from a decrease in the density of interface traps at increasing temper...
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In this study we performed slow and fast bias temperature instability (BTI) measurements on n-channel silicon carbide (SiC) MOSFETs. Threshold voltage (Vth) shifts as well as recovery observed during and after stress applied at different temperatures and stress levels were used to understand the dynamics of charge trapping/capture and detrapping/em...
Citations
... Currently, the radiation effects of SiC metal-oxide semiconductor field-effect transistors (SiC MOSFETs) have gained attention [5][6][7][8]. In 2012, Akturk et al. conducted a TID experiment on 1200 V SiC MOSFET power devices using 60 Co γ-radiation. ...
SiC power devices require resistance to both single-event effects (SEEs) and total ionizing dose effects (TIDs) in a space radiation environment. The split-gate-enhanced VDMOSFET (SGE-VDMOSFET) process can effectively enhance the radiation resistance of SiC VDMOS, but it has a certain impact on the gate oxide reliability of SiC VDMOS. This paper investigates the impact mechanism and regularity of using the SGE process to determine the radiation resistance and long-term reliability of SiC VDMOS under other identical processes and radiation conditions. Our experimental results show that after 60Co γ-ray irradiation, the degradation degrees of the static parameters of SGE-VDMOSFET and planar gate VDMOSFET (PG-VDMOSFET) are similar. The use of the new process leads to more defects in the oxide layer, reducing the long-term reliability of the device, but its stability can recover after high-temperature (HT) accelerated annealing. This research indicates that enhancing the resistance of SEEs using an SGE-VDMOSFET structure requires simultaneously considering the demand for TIDs and long-term reliability.
... In previous studies, total ion dose (TID) and single event effect (SEE) were usually studied separately. [7][8][9] The TID effect has been studied in terms of irradiation conditions, such as temperature [10][11][12] and gate bias. [13][14][15] It has been revealed that the TID effect is induced by the radiation-induced holes moving toward the SiC/SiO 2 interface and trapped by defects in the oxide near the interface. ...
The synergistic effect of total ionizing dose (TID) and single event gate rupture (SEGR) in SiC power MOSFETs was investigated via simulation. The device was found to be more sensitive to SEGR with TID increasing, especially at higher temperature. The microscopic mechanism was revealed to be the increased trapped charges induced by TID and subsequent enhancement of electric field intensity inside the oxide layer.
... 2,6,10,17 In the last decade, anticipated scaling limitations of Si have led to the exploration of new channel materials, such as III-V compound semiconductors. [7][8][9][10][12][13][14][15][16]22,52 Transistors fabricated with new channel materials and high-k dielectrics are often characterized by high densities of defects due to the mismatch of atomic spacing close to the semiconductor/oxide interface and immaturity of fabrication processes. 7,9,12,13,27 In these devices, the LFN magnitude of transistors is often higher than in Si-based devices. ...
... 7,9,12,13,27 In these devices, the LFN magnitude of transistors is often higher than in Si-based devices. [7][8][9][10][12][13][14][15][16]22,51 The LFN of InGaAs transistors has been evaluated before and after x-ray irradiation up to 2 Mrad(SiO 2 ). 12 Transistors were designed in bulk FinFET layouts with 2 nm of HfO 2 over 2 nm of Al 2 O 3 , as shown in Fig. 5(a). 12,13 The as-processed LFN spectra in Fig. 5(b) are characterized by 1/f 2 noise due to RTN at several temperatures, e.g., 120 K. 7,12,13 10-keV X-ray exposures at relatively low doses cause dramatic effects on both the LFN and dc response of InGaAs transistors. ...
Nanometer-scale transistors often exhibit random telegraph noise (RTN) with high device-to-device variability. Recent experiments up to Grad total ionizing dose (TID) demonstrate stable RTN in planar bulk-Si metal-oxide-semiconductor (MOS) transistors and in Si fin field-effect transistors (FinFETs). In these cases, pre-existing defects in the ultrathin gate dielectrics dominate the device low-frequency 1/f noise (LFN). In contrast, III–V MOS devices with lower quality oxide/semiconductor interfaces show significant increases in LFN at much lower doses, due to the TID-induced activation of high densities of border traps. Aggressively scaled devices fabricated in Si gate-all-around nano-wire FET technology exhibit prominent defects leading to LFN and RTN. Increases or decreases of LFN in these devices during irradiation and annealing results primarily from the activation or passivation of border traps and interface traps.
... Copyright 1990 IEEE. 32 simulation, are required to determine the approximate locations and energy levels of the defects responsible for the observed noise. 22,[24][25][26]41,[58][59][60] The second difficulty is that scattering from charged oxide and/or border traps is much weaker than from interface traps. [61][62][63][64] Figure 5(a) summarizes experimental results for devices with radiation-induced oxide-trap charge densities that vary by more than a factor of 10 but still fall on a common curve of the form of Eq. (3). ...
Interface traps generally are not considered to be likely sources of low-frequency (LF) noise and/or random telegraph noise (RTN) in metal–oxide–semiconductor (MOS) devices because the longer carrier exchange times of border traps are more consistent with experimental observations. In contrast, correlated mobility fluctuations due to remote Coulomb scattering from charged border traps cannot explain the unexpectedly large LF noise and/or RTN observed in some MOS devices. In this Letter it is proposed that equilibrium fluctuations in interface-trap concentrations caused by hydrogen-induced activation and passivation reactions can lead to enhanced LF noise and RTN. This mechanism adds to other noise sources, including border traps, random dopants, and bulk-Si defect clusters.
... Recently, silicon carbide has become one of the most popular semiconductor materials due to its excellent performance under high pressure, high temperature, high frequency, and high power [1][2][3][4][5]. Metal-oxide-semiconductor field-effect transistors (MOSFETs) fabricated from 4H-silicon carbide (4H-SiC) have also been widely studied in the field of power electronics, and have broad application prospects for their low on-state resistance, high switching speed, good gate insulation, and anti-radiation properties [6][7][8]. Nevertheless, SiC MOSFETs may still be affected by extreme working conditions leading to degradation [9,10]. Thus, it is necessary to investigate the reliability of SiC power devices. ...
4H-silicon carbide metal-oxide-semiconductor field-effect transistors (4H-SiC MOSFETs) show 1/f low-frequency noise behavior. In this paper, this can be explained by the combination of the mobility fluctuation (Δμ) and the carrier number fluctuation (ΔN) theories. The Δμ theory believes that LFN is generated by the bulk defects, while the ΔN theory holds that LFN originates from the extraordinarily high oxide traps. For 4H-SiC MOSFETs, significant subthreshold noise will appear when only the ΔN theory attempts to model LFN in the subthreshold region. Therefore, we account for the high density of bulk defects (Δμ theory) and characterize the subthreshold noise. The theoretical model allows us to determine the bulk density of the trap states. The proposed LFN model is applicable to SiC MOSFETs and accurately describes the noise experimental data over a wide range of operation regions.
... The method relies on the phenomenon that carbon vacancies clustering at the SiC/SiO2 interface is the most common defect responsible for the 1/f noise [110]- [112]. Because of that, it is possible to find an approximate value for the interface trap density from the LFN characteristics of the tested device [113]. However, the disadvantage of LFN measurement is that the type of injected charges cannot be distinguished [109]. ...
To accelerate the broad application of silicon carbide (SiC) power MOSFETs, their short-circuit (SC) robustness and reliability must be thoroughly evaluated. This paper, therefore, presents an overview of related research methods aiming to meet that objective. Topics reviewed include the non-destructive tester (NDT) used to implement SC faults, extraction and analysis of degradation parameters, and failure analysis of SiC MOSFETs. Concerning the NDT, its design criteria and methods for evaluating SC robustness are discussed. After which, key parameters used to assess SC reliability and methods for investigating degradation mechanisms are discussed and summarized. Finally, failure analysis techniques and their contributions to failure mechanisms are reviewed.
... In the space radiation environment, the total ionizing dose (TID) induced by gamma rays is one of the most important factors that cause the failure of electronic devices. Recently, the radiation response of SiC power MOSFETs to gamma ray irradiation has been studied by several authors [4][5][6][7][8] since SiC high-voltage power MOSFETs have become commercially available. Thus far, the radiation response has been studied in terms of irradiation conditions, such as the temperature [4][5][6] and application of gate bias [7][8][9] . ...
... Recently, the radiation response of SiC power MOSFETs to gamma ray irradiation has been studied by several authors [4][5][6][7][8] since SiC high-voltage power MOSFETs have become commercially available. Thus far, the radiation response has been studied in terms of irradiation conditions, such as the temperature [4][5][6] and application of gate bias [7][8][9] . It has been shown that the radiation-induced holes move toward the SiC/SiO 2 interface owing to the applied electric field, and they are trapped by defects in the oxide near the interface [10,11] . ...
Different switching frequencies are required when SiC metal–oxide–semiconductor field-effect transistors (MOSFETs) are switching in a space environment. In this study, the total ionizing dose (TID) responses of SiC power MOSFETs are investigated under different switching frequencies from 1 kHz to 10 MHz. A significant shift was observed in the threshold voltage as the frequency increased, which resulted in premature failure of the drain–source breakdown voltage and drain–source leakage current. The degradation is attributed to the high activation and low recovery rates of traps at high frequencies. The results of this study suggest that a targeted TID irradiation test evaluation method can be developed according to the actual switching frequency of SiC power MOSFETs.
... Low-frequency noise is an important property of 4H-SiC MOSFETs, which is significantly affected by the quality of the oxide layer. Low-frequency noise determines the signal lower limit of the broadband circuit and the detectivity of the optical receiver [5][6][7][8][9][10][11][12][13]. In fact, the low-frequency noise test offers a sensitive approach for detecting impurities and defects of the MOS structure [5][6][7][8]. ...
... Low-frequency noise determines the signal lower limit of the broadband circuit and the detectivity of the optical receiver [5][6][7][8][9][10][11][12][13]. In fact, the low-frequency noise test offers a sensitive approach for detecting impurities and defects of the MOS structure [5][6][7][8]. In MOSFETs, NIOTs with fast interface state and/or small time constant can induce low mobility [1,[3][4][5], while slow traps induce low-frequency noise [5][6][7][8]. ...
... In fact, the low-frequency noise test offers a sensitive approach for detecting impurities and defects of the MOS structure [5][6][7][8]. In MOSFETs, NIOTs with fast interface state and/or small time constant can induce low mobility [1,[3][4][5], while slow traps induce low-frequency noise [5][6][7][8]. ...
Low-frequency noise is one of the important characteristics of 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) that is susceptible to oxide traps. Drain-source voltage noise models of 4H-SiC MOSFETs under low–drain-voltage and inverse condition were proposed by considering the spatial and energy non-uniform distribution of the oxide trap, based on the McWhoter model for uniform trap distribution. This study performed noise experiments on commercial 4H-SiC MOSFETs, and revealed that the non-uniform spatial and non-uniform energy distribution caused new 1/f noise phenomenon, different from that under uniform spatial and energy distribution. By combining experimental data and theoretical models, the spatial and energy distribution of oxide traps of these samples were determined.
... From Fig. 5, the calculated and experimental α values agree with each other, which further indicates that the temperature and frequency dependence of noise is in good agreement with Dutta and Horn model [33]. Therefore, the defect-energy distribution D(E 0 ) obtained from LFNT measurement, which is positively correlated with the effective defect density [34]- [36], can be estimated via [37] ...
The effect of gamma (γ) -irradiation on AlGaN-based light emitting diodes (LEDs) in the UVC (210 – 280 nm) spectral range under electrical stress is characterized by electroluminescence and current-voltage measurement. Different from previous reports that γ-irradiation can hardly damage nitride devices, we observe that the optical power decreases and leakage current increases obviously after electrical stress under γ-irradiation. To delve into the nature of degradation, variation of defects is studied using temperature-dependent low frequency noise measurement. After stress, the ~0.78 eV defects attributed to N antisite are generated and lead to device degradation, which is accompanied by a reduction of the intrinsic Ga vacancy with an energy level of ~0.38 eV. The variation of defects after stress in γ-irradiated environment is more evident than that in non-irradiated environment, which is well corresponding to the performance degradation behavior. In conclusion, γ-irradiation is found to accelerate degradation induced by electrical stress, and the study can help to improve irradiation resistance in AlGaN-based UVC LEDs.
... LFN of Si MOSFETs has been extensively studied [17]. The temperature-dependent LFN of 4H-SiC MOSFETs with nitride oxides was reported over the temperature range 85-510 K, and the 1/f noise decreases significantly with increasing measurement temperature [18]. LFN in 4H-SiC JFETs has been investigated, and these extremely low noise values were determined by the noise at the SiC/SiO2 interface [19]. ...
In this paper, the degradation behavior of the electrical characteristics was investigated, and trap analysis based on low-frequency noise (LFN) was carried out for the commercial 1.2-kV/30-A silicon carbide (SiC) power MOSFETs under repetitive short-circuit (SC) stress. The experiment results show that the on-state resistance (Rdson) and threshold voltage (Vth) increase significantly. Meanwhile, the drain-source current (Ids) decreases obviously with the increase of the SC cycles. Furthermore, the gate-source leakage current (Igss) of the SiC power MOSFETs increase greatly and the blocking characteristics deteriorated after 1000 SC cycles. The positive shift was observed on the gate-capacitance versus gate-voltage (Cg-Vg) curve, which shows that the damage region could be in channel along the SiC/SiO2 interface after repetitive SC stress. In order to obtain the trap information, trap characterization was performed by using LFN method, and the LFN results show that the trap density increases with the SC cycles. The physical mechanism could be attributed to electrically active traps generated at SiC/SiO2 interface and oxide layer due to the peak ionization rate, the perpendicular electrical field and high temperature during SC stress. The study may be useful to provide reference for converters design and fault protection of SiC power MOSFETs.
