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Electrical characteristics of sub-100-nm bilayer WSe2 transistors a, Schematic of the fabrication process of ultrashort-channel WSe2 transistors with VSe2 contacts. b, Optical microscopy images of the device structure. Scale bar, 5 μm. c,f, SEM images of bilayer WSe2 transistors with channel lengths of 76 nm (c) and 20 nm (f). Scale bars, 100 nm. d,g, Output characteristics of the 76 nm (d) and 20 nm (g) WSe2 transistors at various back-gate voltages (Vgs) with a step of 5 V. e,h, Transfer curves of the 76 nm (e) and 20 nm (h) bilayer WSe2 transistors at various bias voltages.
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Two-dimensional semiconductors such as layered transition metal dichalcogenides can offer superior immunity to short-channel effects compared with bulk semiconductors such as silicon. As a result, these materials can be used to create highly scaled transistors. However, on-state current densities of two-dimensional semiconductor transistors are sti...
Citations
... This unique property facilitates the integration of materials of varying dimensions, reminiscent of atomic-scale Lego assembly, paving the way for the integration of multifunctional devices on a single chip, including photonic and memory units, without the constraints of lattice matching [3][4][5][6][7][8] . While significant advancements have been achieved in both n-type [10][11][12][13] and p-type [14][15][16][17] TMDs, leading to highperformance FETs with current densities in the hundreds of μA/μm at scaled biases, several unresolved questions about how to achieve optimal overall performance of TMD transistors remain. Many of these questions arise from these devices being "interface-only" transistors, thus exhibiting an increased sensitivity to their interface and oxide traps, and defects created during fabrication 2,12,[18][19][20][21] . ...
The successful integration of ultrathin high-κ insulators is essential for the advancement of ultra-scaled field-effect transistors (FETs) based on two-dimensional (2D) semiconductors in future technology nodes. However, defects within the high-κ stack or at the interfaces can significantly degrade the performance of these “interface-only” devices, raising questions regarding their long-term reliability. Here, we study the reliability of monolayer MoS 2 FETs on ultra-thin high-κ HfO 2 . Interestingly, we observe a two-stage threshold voltage shift (Δ V TH ) under positive bias temperature stress (PBTS) and hot carrier degradation (HCD), attributed to electron trapping in preexisting traps and the generation of hydrogen-assisted donor traps within the gate oxide. In contrast, devices fabricated on exfoliated hBN lack this two-stage Δ V TH , implying such donor trap generation is induced by atomic-layer-deposition (ALD) processes used in HfO 2 -based devices. Refining the ALD process emerges as a key strategy for enhancing the stability of 2D FETs to meet silicon CMOS standards.
... Two-dimensional (2D) semiconductors are promising channel materials for scaling optoelectronic devices [1][2][3] . Miniaturized devices require higher gate capacitance to improve device performance and reduce power consumption. ...
High dielectric constant (high-κ) gate dielectrics compatible with two-dimensional (2D) semiconductors are essential for scaled optoelectronic devices. However, conventional three-dimensional dielectrics are difficult to integrate with 2D materials with dangling-bond-free surfaces. Here we show that the 2D perovskite oxide Sr2Nb3O10, prepared by a top-down approach, can be integrated with various 2D channel materials. The high dielectric constant (24.6) and moderate bandgap of Sr2Nb3O10 allow it to be used as a photoactive high-κ dielectric for phototransistors with various 2D channel materials, including graphene, molybdenum disulfide, tungsten disulfide and tungsten diselenide. Molybdenum disulfide transistors exhibit an on/off ratio of 10⁶ with a supply voltage of 2 V and a subthreshold swing of 88 mV dec⁻¹. Tungsten disulfide phototransistors exhibit a photocurrent-to-dark-current ratio of ~10⁶ and ultraviolet (UV) responsivity of 5.5 × 103 A W⁻¹ under visible or UV light illumination, due to the combined effect of gate control and charge transfer from the photoactive gate dielectric. We also show that the phototransistors with the photoactive dielectric can offer UV–visible dual-band photodetection, where UV and visible light illumination are distinguished at separate terminals.
... As V ds increases, the ON/OFF ratio deteriorates, and the threshold voltage shows a positive shift, which may be attributed to the competitive control of the transistor channel by the gate voltage and drain-source bias in short-channel devices. Under a high drain bias, the electric field of the drain overpowers that of the gate, compromising the controllability of the gate 37 . ...
Multiple structural phases of tellurium (Te) have opened up various opportunities for the development of two-dimensional (2D) electronics and optoelectronics. However, the phase-engineered synthesis of 2D Te at the atomic level remains a substantial challenge. Herein, we design an atomic cluster density and interface-guided multiple control strategy for phase- and thickness-controlled synthesis of α-Te nanosheets and β-Te nanoribbons (from monolayer to tens of μm) on WS2 substrates. As the thickness decreases, the α-Te nanosheets exhibit a transition from metallic to n-type semiconducting properties. On the other hand, the β-Te nanoribbons remain p-type semiconductors with an ON-state current density (ION) up to ~ 1527 μA μm⁻¹ and a mobility as high as ~ 690.7 cm² V⁻¹ s⁻¹ at room temperature. Both Te phases exhibit good air stability after several months. Furthermore, short-channel (down to 46 nm) β-Te nanoribbon transistors exhibit remarkable electrical properties (ION = ~ 1270 μA μm⁻¹ and ON-state resistance down to 0.63 kΩ μm) at Vds = 1 V.
... We find that the carrier mobility of black phosphorus drops sharply when reducing body thickness, behaving more like a conventional bulk semiconductor rather than a pure van der Waals semiconductor. Two-dimensional (2D) semiconductors could be used as atomically thin channels in future transistors, providing immunity to short-channel effects [1][2][3][4] . In conventional bulk semiconductors, carrier mobility drops quickly with reducing body thickness 5,6 , but 2D semiconductors offer a dangling-bond-free surface with little mobility degradation with reduced body thickness 7,8 . ...
Two-dimensional (2D) semiconductors can potentially be used to create scaled electronic devices. However, for a number of promising 2D materials—such as black phosphorus and germanium arsenide—the fabrication of monolayer transistors is challenging and is limited by the difficulties in forming robust electrical contacts with the delicate 2D materials. Here, we report the fabrication of monolayer black phosphorus and germanium arsenide transistors with three-dimensional raised contacts using a van der Waals peeling technique. Through layer-by-layer mechanical peeling, the channel region of a multilayer black phosphorus transistor can be gradually reduced to monolayer thickness without degrading its delicate lattice and while retaining a multilayer contact region. Using the technique, we measure the electrical properties of the same 2D transistor with different channel thicknesses. We find that the carrier mobility of black phosphorus drops sharply when reducing body thickness, behaving more like a conventional bulk semiconductor rather than a pure van der Waals semiconductor.
... Secondly, bilayer structures are experimentally accessible and are suitable for device applications. Their potential to tailor electronic and magnetic properties makes them interesting for both fundamental and applied research [33][34][35]. The remaining part of this paper is structured as follows: Section 2 provides an overview of the methodology and computational techniques employed. ...
Using the Density Functional Theory (DFT) calculations, we determined the electronic and magnetic properties of a T-phase VS2 bilayer as a function of tensile and compressive strain. First, we determine the ground state structural parameters and then the band structure, magnetic anisotropy, exchange parameters, and Curie temperature. Variation of these parameters with the strain is carefully analyzed and described. The easy-plane anisotropy, which is rather small in the absence of strain, becomes remarkably enhanced by tensile strain and reduced almost to zero by compressive strain. We also show that the exchange parameters and the Curie temperature are remarkably reduced for the compressive strains below roughly −4%.
... highly promising as a next-generation channel material for ultrascaled field-effect transistors (FETs), as their atomically thin nature ensures excellent electrostatic control of the channel potential [2], [3], [4], [5], [6], [7], [8]. Recent progress has been made on both n-type [9], [10], [11], [12], [13], [14] and p-type [15], [16], [17], [18], [19], [20] TMDs for realizing high-performance FETs exhibiting hundreds of µA/µm current densities at a bias of 1 V. Despite steady progress over the last decade, a substantial amount of open questions regarding the ultimate performance of TMD transistors remain, many of them related to the fact that these devices are "interface-only" transistors and are much more sensitive to the surrounding environment, fabrication processes, and treatments. ...
Machine learning (ML) algorithms have been widely adopted in the industry for optimizing semiconductor process modules. However, the final device performance may depend on a myriad of variables, including process conditions and device design parameters in an entangled fashion. This makes gaining detailed physical insights necessary to disentangle all these factors effectively. Here, we propose a design and process co-optimization framework using ML to improve the performance of 2-D transistors in analogy to conventional process optimization-design of experiments (DOEs). In particular, we utilize the “feature importance score” to quantitatively evaluate the impact of each process step or design feature on the final device performance. Example given, through the utilization of a random forest ML algorithm, we can design distinct threshold voltages by combining suitable process and design parameters. This framework aims at unrevealing the ultimate performance of 2-D field-effect transistors (FETs) through an expedited process that allows for quick experimental turnaround.
... Therefore, the Schottky barrier height (ϕ SB ) is highly tunable and determined by the work-function difference of the metal and semiconductor, which can be used to create transistors with ohmic contacts or near-ideal rectifiers with Schottky junctions 17,22,23 . Two-dimensional metallic transition metal dichalcogenides (m-TMDs), such as NbX 2 , VX 2 and TaX 2 (where X = S, Se and Te), exhibit high electrical conductivity [24][25][26][27][28][29][30][31][32][33] , and field-effect transistors (FETs) contacted with in situ-grown 2D m-TMDs exhibit improved device performance and yield compared with traditional metal contacts 34,35 . However, most recent studies focus on the characterization of the vdW interfaces and not the work function of 2D m-TMDs, which is often studied using theoretical techniques 36 . ...
... The high-resolution high-angle annular dark-field STEM image ( Supplementary Fig. 13g) taken at the interface of VS 2x Se 2(1-x) / WSe 2 vdWHs confirmed an atomically sharp boundary along the heterostructure interface, without any apparent atomic mixing or defects. Such an ideal heterointerface is consistent with our previous reports 34,35 , suggesting that the epitaxial growth of VS 2x Se 2(1-x) alloy has no effect on the interfacial quality of vdWHs and provides a good foundation for subsequent device fabrication. To further confirm that the underlying WSe 2 was not doped with S during the second epitaxy, Raman and photoluminescence characterizations of WSe 2 were conducted before and after VS 2 growth ( Supplementary Fig. 14). ...
Heterostructures made using two-dimensional semiconducting transition metal dichalcogenides could be used to build next-generation electronic devices. However, their performance is limited by low-quality metal–semiconductor contacts, and it remains challenging to create contacts with variable work functions using metals or metallic transition metal dichalcogenides. Here we show that a one-step chemical vapour deposition method can be used to fabricate nanoplates of a two-dimensional metallic alloy VS2xSe2(1–x) (where 0 ≤ x ≤ 1), which has a continuously tunable band alignment. The work function of the alloy can vary from 4.79 ± 0.01 eV (VSe2, x = 0) to 4.64 ± 0.01 eV (VS2, x = 1.00). The van der Waals heterostructures of VS2xSe2(1–x) and p-type tungsten diselenide (WSe2) exhibit increased contact potential difference as x varies from 0 to 1, with transistors made using VSe2/WSe2 contacts showing a lower potential difference and better device performance than transistors with VSSe/WSe2 contacts, and in both cases, achieve better performance than devices with evaporated metal contacts. The contact potential difference in heterostructures of the alloy and n-type molybdenum disulfide can be turned from −71.5 mV (VSe2) to 0 mV (VSSe) to 59.3 mV (VS2)—that is, from Schottky to ohmic contacts—with the lowest-work-function (VS2) transistors showing the best performance.
... Figure 3G further indicates the ideal interface without the FLP effect because the extracted SBH perfectly followed the Schottky-Mott limit. Wu et al. [78] fabricated an ultrashort WSe 2 transistor with high current density above 1 mA/μm based on VSe 2 contact owing to the atomically clean vdW interface. Due to the ultrathin nature of all 2D vdW junction, it exhibits the simplicity in large-area fabrication through dry transfer technique compared with the device with 2D semiconductor and 3D metal. ...
Two-dimensional (2D) materials with unique band structures have shown great potential for modern electronics and optoelectronics. The junction composed of metals and 2D van der Waals (vdW) materials, which is characterized by the Schottky barrier, is crucial to the device performance as well as functionality. However, it usually suffers from uncontrollable Schottky barrier due to the strong Fermi level pinning (FLP) effect, which hinders the further optimization of devices. In this review, we summarized the origin of FLP by introducing different models. Several Fermi level depinning strategies were then discussed to enable the tuning of Schottky barrier, which can be used for the precise design and modulation of vdW Schottky diode. We further reviewed the progress of the state-of-the-art photodetectors based on vdW Schottky junction in terms of different configurations and working principles. The strategies for improving the performance of vdW Schottky junction-based photodetector was also presented. Finally, we provided a summary and outlook for the development of vdW Schottky junction and photodetectors.
... However, no systematic studies on the impact of 3D metallization on 2D metals (as opposed to 2D semiconductors) in 2D/2D MSJs have been conducted, despite the fact that 3D contact pads are required for all 2D devices. This is particularly important because the use of 2D metals as an electronic component in all-2D circuits become more frequent (e.g., graphene 25,26 , and VSe 2 27 , NbSe 2 28 as contact electrodes for WSe 2 transistors); however, the 2D semimetal WF tuned by 3D metal is often overlooked. Moreover, the vast majority of vdW-integrated 2D metals have been fabricated with mechanically exfoliated [29][30][31] or CVD-grown irregular flakes 32,33 , which are impractical for high-yield manufacturing. ...
High-performance p-type two-dimensional (2D) transistors are fundamental for 2D nanoelectronics. However, the lack of a reliable method for creating high-quality, large-scale p-type 2D semiconductors and a suitable metallization process represents important challenges that need to be addressed for future developments of the field. Here, we report the fabrication of scalable p-type 2D single-crystalline 2H-MoTe2 transistor arrays with Fermi-level-tuned 1T’-phase semimetal contact electrodes. By transforming polycrystalline 1T’-MoTe2 to 2H polymorph via abnormal grain growth, we fabricated 4-inch 2H-MoTe2 wafers with ultra-large single-crystalline domains and spatially-controlled single-crystalline arrays at a low temperature (~500 °C). Furthermore, we demonstrate on-chip transistors by lithographic patterning and layer-by-layer integration of 1T’ semimetals and 2H semiconductors. Work function modulation of 1T’-MoTe2 electrodes was achieved by depositing 3D metal (Au) pads, resulting in minimal contact resistance (~0.7 kΩ·μm) and near-zero Schottky barrier height (~14 meV) of the junction interface, and leading to high on-state current (~7.8 μA/μm) and on/off current ratio (~10⁵) in the 2H-MoTe2 transistors.
... [1][2][3] In particular, the direct bandgap and corresponding exciton physics of monolayer MoS 2 were discovered. 4,5 Furthermore, these 2D materials have a series of attractive characteristics, such as excellent catalytic, 6,7 magnetic, [8][9][10][11][12] and electrical [13][14][15][16] properties. Patterning 2D semiconductors with holed array nanostructures can have many imperative properties. ...
The controllable synthesis of complicated nanostructures in advanced two‐dimensional (2D) semiconductors, such as periodic regular hole arrays, is essential and remains immature. Here, we report a green, facile, highly controlled synthetic method to efficiently pattern 2D semiconductors, such as periodic regular hexagonal‐shaped hole arrays (HHA), in 2D‐TMDs. Combining the production of artificial defect arrays through laser irradiation with anisotropic annealing etching, we created HHA with different arrangements, controlled hole sizes, and densities in bilayer WS 2 . Atomic force microscopy (AFM), Raman, photoluminescence (PL), and scanning transmission electron microscopy (STEM) characterization show that the 2D semiconductors have high quality with atomical clean and sharp edges as well as undamaged crystals in the unetched region. Furthermore, other nanostructures, such as nanoribbons and periodic regular triangular‐shaped 2D‐TMD arrays, can be fabricated. This kind of 2D semiconductors fabrication strategy is general and can be extended to a series of 2D materials. Density functional theory (DFT) calculations show that one WS 2 molecule from the edges of the laser‐irradiated holed region exhibits a robust etching activation, making selective etching at the artificial defects and the fabrication of regular 2D semiconductors possible.
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