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EEect of memory bank read and write connict

EEect of memory bank read and write connict

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In this contribution we report benchmark results obtained with the EuroBen Benchmark version 3.0. Results for one CPU are presented. To add some perspective, we occasionally compare some of the results with those obtained on Cray systems (Y-MP and C90), NEC systems (SX-3/12 and /14), and a Siemens-Nixdorf S200.

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Context 1
... speeds for this problem would increase to 189, 7783, and 1452 MMop/s, respectively. Although the estimated speed for the Hitachi S3800 is highly unlikely (it would attain 86% of its theoretical peak perfor- /s 512512 171 2666 852 2736125 182 2265 873 646464 161 1494 698 Table 10 mance in this case), it would certainly show a higher speed. We did not have an opportunity to actually measure it. ...
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... is roughly in line with the peak speeds of the machines considered, although the SX-3 behaves somewhat better than could be expected and the S3800 somewhat worse. Table 13 shows the results of another implementation of solving the Laplace equation. A generalised red-black relxation scheme is used here and the problem sizes ranging from 1717 to 20492049 are calculated. ...
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... generalised red-black relxation scheme is used here and the problem sizes ranging from 1717 to 20492049 are calculated. Table 13 shows that at small problem sizes the SX-3/14 outperforms the S3800. At larger vectorlengths the S3800 is faster than the SX-3. ...

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In this report we give an overview of parallel- and vector computers which are currently available or will become available within a short time frame from vendors; no attempt is made to list all machines that are still in the research phase. The machines are described according to their architectural class. Shared- and distributed memory SIMD- and MIMD machines are discerned. The information about each machine is kept as compact as possible. Moreover, no attempt is made to quote prices as these are often even more elusive than the performance of a system. This document reflects the technical state of the supercomputer arena as accurately as possible. However, the authors nor their employers take any responsibility for errors or mistakes in this document. We encourage anyone who has comments or remarks on the contents to inform us, so we can improve this work. 1 Academic Computing Centre Utrecht, PO Box 80.011, 3508 TA Utrecht, The Netherlands, actstea@cc.ruu.nl y Department of Com...