Configuration of the photoelectric memory based on BP/PZT heterostructure BP/PZT FeFET. A) Schematic illustration of the photoelectric memory in FeFET with BP/PZT heterostructure fabricated on LNO/SiO2/Si substrate. B) Optical image of a typical two‐terminal FET device with few‐layer BP channel layer and contact electrodes on PZT. Inset shows the AFM line profile of the BP layer with thickness of around 6 nm. Channel width and length of the FET are defined to be 5 and 8 µm, respectively. C) Cross‐sectional TEM image of the device. D) HRTEM image of the corresponding BP/PZT heterostructure of the device, marked by a azure dashed ellipse in (C). Inset presents the clear layered structure of the BP with 0.55 nm spacing. E) Raman spectra of few layers BP on PZT/Si, bulk BP, and blank PZT/Si, respectively.

Configuration of the photoelectric memory based on BP/PZT heterostructure BP/PZT FeFET. A) Schematic illustration of the photoelectric memory in FeFET with BP/PZT heterostructure fabricated on LNO/SiO2/Si substrate. B) Optical image of a typical two‐terminal FET device with few‐layer BP channel layer and contact electrodes on PZT. Inset shows the AFM line profile of the BP layer with thickness of around 6 nm. Channel width and length of the FET are defined to be 5 and 8 µm, respectively. C) Cross‐sectional TEM image of the device. D) HRTEM image of the corresponding BP/PZT heterostructure of the device, marked by a azure dashed ellipse in (C). Inset presents the clear layered structure of the BP with 0.55 nm spacing. E) Raman spectra of few layers BP on PZT/Si, bulk BP, and blank PZT/Si, respectively.

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Ferroelectric‐field‐effect‐transistor (FeFET) memory, characterized by its nonvolatile, nondestructive readout operation and low power consumption, has attracted tremendous attention in the development of next‐generation random‐access memory. However, the electrical reading processes in conventional FeFETs may attenuate the ferroelectric (FE) polar...

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