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Comparison between DDR2 and NAND-Flash memory domains TABLE I SAMPLES USED FOR TID TESTS TID Test Campaign  

Comparison between DDR2 and NAND-Flash memory domains TABLE I SAMPLES USED FOR TID TESTS TID Test Campaign  

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We report on new results of TID tests on an advanced 8-Gbit NAND-Flash memory. Data error percentage and standby current depend strongly on operational mode. Preventive memory refresh is proposed to move the first error occurrence to significant higher dose values. The count of erase cycles until wear out is not affected by the accumulated dose.

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... this time NAND-Flash based telemetry buffer memories are under development at several sites [4], [5]. In this type of application the wear out limit will not be reached even after 10 years of operation. Fig. 1 presents a comparison between DDR2 SDRAM and NAND-Flash based memory modules of comparable physical size and mass, mounted with either sin- gle-die DDR2 or single-die NAND-Flash devices [6]. Ex- tremely high bit rates above 10 Gbps are the domain of DDR2 based buffer memories, and extremely high capacities of above 500 Gbit the domain ...

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... Owing to its storage mechanism, FG memory is naturally sensitive to ionizing radiation which generates electron-hole pairs, disturbs the charge stored in the floating gate, and sabotages the information retained in the device. Total dose failures have been reported in Flash memories at 50 krad [12], 25 krad [13], or even at dose levels less than 15 krad [14,15]. In addition, scaling limitations [16] of the FG because of the ultra-thin oxide and the current leakage are also hindering it from future development. ...
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Current commercial field programmable gate arrays (FPGAs) take serial configuration architecture to realize their programmability. However, the serial configuration circuit is very weak for radiation in terms of both total-ionizing-dose and soft-error tolerances. If radiation permanently breaks even only a few transistors inside an FPGA, the serial configuration circuit is easily down at an extremely high probability. Always, the total-ionizing-dose tolerance of radiation-hardened FPGAs is limited to up to 2 Mrad. In order to increase the total-ionizing-dose, a radiation-hardened FPGA with a triple-modular-redundant configuration circuit that can achieve 730 Mrad total-ionizing-dose tolerance has been developed. The radiation-hardened FPGA can allow a number of transistors to be broken by radiation and can have a large clock skew margin. This paper presents the analysis result of the clock tree buffer degradation caused by radiation based on the experimental result of the degradation of look-up tables and clarify the suitable clock skew margin of the radiation-hardened FPGA.
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