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͑ Color online ͒ ͑ a ͒ Schematic diagram of TFT structure based on SiNCs, ͑ b ͒ Scanning electron micrograph ͑ SEM ͒ of Si nanocrystal films. The inset is the transmission electron microscopy image of one SiNC with diameter of ϳ 10 nm.
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In this letter, we report a phenomenon of the current fluctuations by measuring lateral conduction of the three-dimensionally stacked Si nanocrystal (SiNC) thin films based on thin film transistor structures. Through measuring current-voltage (I-V) characteristics, drain-source current (Ids) exhibits fluctuations in particular gate voltage (Vg) and...
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Context 1
... nanocrystals SiNCs , as one of the functional materials for nanoelectronics devices, have attracted much attention in recent years because of their electronic and op- 1 tical characteristics. Up to now, SiNCs memory devices due to its unique advantages have been widely investigated as the 2 descendant of flash memories. The light-emission devices based on SiNCs has also attracted great interest due to its 3 potential in realizing optoelectronic integrated circuits. Devices with a few SiNCs have been proposed as single elec- 4 tron transistors and nanoscale electrometers for quantum in- 5 formation processing. Moreover, SiNCs are expected to be used in the application of high efficiency electron emitters, 6 due to the low energy loss of emitted electrons. Investigation of carrier transport mechanism in SiNCs has attracted great interests, as it is essential to develop the device applications of SiNCs. In SiNCs, the phenomenon of 7 the conduction which is dominated by hopping conduction, 8 space charge limited current transport and Poole–Frenkel 9 type transport has been observed. Random charging/ discharging phenomenon also attracts much interest in the investigation of the metal-oxide-semiconductor and metal- 10,11 insulator-semiconductor devices with a few SiNCs. Besides, current fluctuations which are caused by single-hole charging/discharging in two-dimensional ͑ 2D ͒ Si multidots 12 have been reported by R. Nuryadi et al. However, up to now, there are few reports about the charging/discharging phenomenon in three-dimensionally ͑ 3D ͒ stacked SiNC thin films. Compared with the carrier transport situation in one- dimensional ͑ 1D ͒ or 2D multidots, the numbers of both the current paths and the nearest neighbors of each SiNC in 3D stacked SiNC thin films are much larger. Consequently, it is difficult to observe charging/discharging phenomenon in 3D stacked SiNC thin films due to the averaging effects by the peak superimposition or influences from the neighbor 12,13 SiNCs’ charging situations. In this letter, we report the observation of the current fluctuations in 3D stacked SiNC thin films based on the thin film transistor ͑ TFT ͒ structures. The transport mechanism is discussed in terms of the model that the whole SiNC thin films conduction is dominated by the charging situations of those critical SiNCs which exist in the intersection of the several current paths. The device structure used in this experiment is a SiNC TFT structure. A 110-nm-thick SiO 2 was formed as a gate dielectric layer by thermal oxidation on the highly doped n + -Si substrates with resistivity of 0.02 ⍀ cm. Then, sparse SiNC thin films, 150 nm in thickness, were deposited on the 14 SiO 2 layer using the very-high-frequency SiH 4 plasma cell. After the deposition, electrode patterns were fabricated by electron beam lithography with polymethyl-methacrylate as resist. Device fabrication process was completed by deposit- ing a 200-nm-thick Al layer using an e-beam evaporator and lift-off process. Both the source and drain contacts are Al Schottky contacts. The n + -Si substrate works as a backgate. The channel length is about 150 nm and the width 20 m, as shown in Fig. 1 ͑ a ͒ . The average size of each SiNC was controlled to be 6 Ϯ 1 nm with the flux of SiH 4 and Ar of 1.6 sccm and 90 sccm respectively with ϳ 2 W plasma power. Each SiNC is covered by an oxide shell, 1 – 1.5 nm in thickness as shown in inset of Fig. 1 ͑ b ͒ , formed by a natural oxidation process due to the exposure to the air. 6 Figure 1 ͑ b ͒ shows the scanning electron micrograph ͑ SEM ͒ of SiNCs. There are some voids in the SiNC film, which are caused by the spherical characteristics of the SiNCs. The variations in SiNCs local density are due to the random deposition of SiNCs on the substrates. Characteristics of the lateral conduction of SiNC films are investigated by I - V measurement at room temperature. The measurement of gate voltage V g dependence of drain- source current ͑ I ds ͒ starts from positive to negative gate voltages, at a drain voltage V ds = 5 V. Figure 2 shows the I ds - V g characteristics obtained by sweeping the V g from 5 to Ϫ 8 V with 0.25 V/s sweeping rate in the following situations: ͑ a ͒ start at the initial states ͑ without charging the SiNCs ͒ , ͑ b ͒ the second time measurement, 10 min after the initial measurement. During the 10 min waiting time, positive V ds bias was not maintained. ͑ c ͒ The third time measurement, after the second time measurement, V ds was applied Ϫ 5 V for 30 s. The period between the status of the V ds Ͻ 0 and the V g sweep is 10 s. Both Figs. 2 ͑ a ͒ and 2 ͑ b ͒ show that I ds exhibits clear fluctuations in certain V g region. The current peak spacing ͑ ⌬ V g ͒ randomly changes in the range of 600 to 950 mV. However, current fluctuations cannot be clearly observed during the third time measurement, as shown in Fig. 2 ͑ c ͒ . The current fluctuations have also been observed in I ds - V ds characteristics at certain V ds and V g regions, by measuring devices with the similar structure shown in Fig. 3 ͑ a ͒ . In this device structure, highly doped Si layer is used to form source and drain Ohimic contacts. The SiO 2 film, 200 nm in thickness, works as a back-gate insulator. SiNCs measured in the devices are deposited under the same deposition condi- tion as SiNCs previously measured. The measurement results exhibit n-channel characteristics, which are different from previous measurement results shown in Fig. 2. It may be 15 caused by the metals/SiNCs contacts. Here, we focus on the phenomenon of current fluctuations. The I ds - V ds characteristics show current fluctuations for a finite range of the V g ͑ 30–40 V ͒ and in both forward and backward sweep directions. It indicates that the current fluctuations in SiNCs are not always random events and the electric fields have the effects on the current fluctuations. The voltage spacing between each two neighbor current peaks are also different from each other. Moreover, there are voltage shifts between the current peaks measured in the forward and backward directions as shown in Fig. 3 c . The hysteresis phenomenon has also been observed. In the investigations of Al nanocrystals embedded in alu- 16 minum nitride thin film, Liu et al. have reported that charging/discharging processes contribute to the phenom- 16 enon of the sharp changes in the conductance. If the argu- ment is also true for our experimental results, these current fluctuations are expected to be influenced by SiNCs charging situations. In other words, the characteristics of the current fluctuations should change with the measurement times as the charging situation of the SiNCs are randomly changed due to the charges trapping or detrapping process in each time measurement. Thus, we check those two times measurement results which are shown in Figs. 2 ͑ a ͒ and 2 ͑ b ͒ . The second time measurement results exhibit clearly different overall characteristics of I ds - V g curves and different number of the current peaks, as shown in Fig. 2 ͑ b ͒ . In addition, these current fluctuations are accompanied with both variations of the voltage spacing and the voltage shifts as shown in Figs. 2 ͑ a ͒ and 2 ͑ b ͒ and Fig. 3 ͑ b ͒ . Besides, these current fluctuations cannot be observed during the third time measurement, as shown in Fig. 2 ͑ c ͒ , when devices are applied Ϫ 5 V for 30 s before starting the measurement. The trapped charges ͑ which are induced during applying V ds = 5 V in the initial measurement and the second time measurement ͒ will be released when the opposite voltages are applied on the devices ͑ V ds = −5 V ͒ , as demonstrated in Figs. 4 ͑ a ͒ and 4 ͑ b ͒ . ͑ It has to mention that the trapped carriers’ effects on the SiNC band bending have not been considered in Fig. 4. ͒ Consequently, the charging situation of the whole SiNC thin film has been totally changed by applying Ϫ 5 V on the device for 30 s. Thus, based on experimental results described above, it can be concluded that the current fluctuations are greatly influenced by the changes of the SiNC charging situations. To explain these experimental results, we propose a model that the charging/discharging processes of the SiNCs existing in the intersection of several current paths is responsible for the current fluctuations. The conduction of whole SiNC thin films is dominated by these critical SiNCs with the highest resistance tunnel junctions. In the 3D stacked SiNC thin films, several percolation ...
Context 2
... nanocrystals SiNCs , as one of the functional materials for nanoelectronics devices, have attracted much attention in recent years because of their electronic and op- 1 tical characteristics. Up to now, SiNCs memory devices due to its unique advantages have been widely investigated as the 2 descendant of flash memories. The light-emission devices based on SiNCs has also attracted great interest due to its 3 potential in realizing optoelectronic integrated circuits. Devices with a few SiNCs have been proposed as single elec- 4 tron transistors and nanoscale electrometers for quantum in- 5 formation processing. Moreover, SiNCs are expected to be used in the application of high efficiency electron emitters, 6 due to the low energy loss of emitted electrons. Investigation of carrier transport mechanism in SiNCs has attracted great interests, as it is essential to develop the device applications of SiNCs. In SiNCs, the phenomenon of 7 the conduction which is dominated by hopping conduction, 8 space charge limited current transport and Poole–Frenkel 9 type transport has been observed. Random charging/ discharging phenomenon also attracts much interest in the investigation of the metal-oxide-semiconductor and metal- 10,11 insulator-semiconductor devices with a few SiNCs. Besides, current fluctuations which are caused by single-hole charging/discharging in two-dimensional ͑ 2D ͒ Si multidots 12 have been reported by R. Nuryadi et al. However, up to now, there are few reports about the charging/discharging phenomenon in three-dimensionally ͑ 3D ͒ stacked SiNC thin films. Compared with the carrier transport situation in one- dimensional ͑ 1D ͒ or 2D multidots, the numbers of both the current paths and the nearest neighbors of each SiNC in 3D stacked SiNC thin films are much larger. Consequently, it is difficult to observe charging/discharging phenomenon in 3D stacked SiNC thin films due to the averaging effects by the peak superimposition or influences from the neighbor 12,13 SiNCs’ charging situations. In this letter, we report the observation of the current fluctuations in 3D stacked SiNC thin films based on the thin film transistor ͑ TFT ͒ structures. The transport mechanism is discussed in terms of the model that the whole SiNC thin films conduction is dominated by the charging situations of those critical SiNCs which exist in the intersection of the several current paths. The device structure used in this experiment is a SiNC TFT structure. A 110-nm-thick SiO 2 was formed as a gate dielectric layer by thermal oxidation on the highly doped n + -Si substrates with resistivity of 0.02 ⍀ cm. Then, sparse SiNC thin films, 150 nm in thickness, were deposited on the 14 SiO 2 layer using the very-high-frequency SiH 4 plasma cell. After the deposition, electrode patterns were fabricated by electron beam lithography with polymethyl-methacrylate as resist. Device fabrication process was completed by deposit- ing a 200-nm-thick Al layer using an e-beam evaporator and lift-off process. Both the source and drain contacts are Al Schottky contacts. The n + -Si substrate works as a backgate. The channel length is about 150 nm and the width 20 m, as shown in Fig. 1 ͑ a ͒ . The average size of each SiNC was controlled to be 6 Ϯ 1 nm with the flux of SiH 4 and Ar of 1.6 sccm and 90 sccm respectively with ϳ 2 W plasma power. Each SiNC is covered by an oxide shell, 1 – 1.5 nm in thickness as shown in inset of Fig. 1 ͑ b ͒ , formed by a natural oxidation process due to the exposure to the air. 6 Figure 1 ͑ b ͒ shows the scanning electron micrograph ͑ SEM ͒ of SiNCs. There are some voids in the SiNC film, which are caused by the spherical characteristics of the SiNCs. The variations in SiNCs local density are due to the random deposition of SiNCs on the substrates. Characteristics of the lateral conduction of SiNC films are investigated by I - V measurement at room temperature. The measurement of gate voltage V g dependence of drain- source current ͑ I ds ͒ starts from positive to negative gate voltages, at a drain voltage V ds = 5 V. Figure 2 shows the I ds - V g characteristics obtained by sweeping the V g from 5 to Ϫ 8 V with 0.25 V/s sweeping rate in the following situations: ͑ a ͒ start at the initial states ͑ without charging the SiNCs ͒ , ͑ b ͒ the second time measurement, 10 min after the initial measurement. During the 10 min waiting time, positive V ds bias was not maintained. ͑ c ͒ The third time measurement, after the second time measurement, V ds was applied Ϫ 5 V for 30 s. The period between the status of the V ds Ͻ 0 and the V g sweep is 10 s. Both Figs. 2 ͑ a ͒ and 2 ͑ b ͒ show that I ds exhibits clear fluctuations in certain V g region. The current peak spacing ͑ ⌬ V g ͒ randomly changes in the range of 600 to 950 mV. However, current fluctuations cannot be clearly observed during the third time measurement, as shown in Fig. 2 ͑ c ͒ . The current fluctuations have also been observed in I ds - V ds characteristics at certain V ds and V g regions, by measuring devices with the similar structure shown in Fig. 3 ͑ a ͒ . In this device structure, highly doped Si layer is used to form source and drain Ohimic contacts. The SiO 2 film, 200 nm in thickness, works as a back-gate insulator. SiNCs measured in the devices are deposited under the same deposition condi- tion as SiNCs previously measured. The measurement results exhibit n-channel characteristics, which are different from previous measurement results shown in Fig. 2. It may be 15 caused by the metals/SiNCs contacts. Here, we focus on the phenomenon of current fluctuations. The I ds - V ds characteristics show current fluctuations for a finite range of the V g ͑ 30–40 V ͒ and in both forward and backward sweep directions. It indicates that the current fluctuations in SiNCs are not always random events and the electric fields have the effects on the current fluctuations. The voltage spacing between each two neighbor current peaks are also different from each other. Moreover, there are voltage shifts between the current peaks measured in the forward and backward directions as shown in Fig. 3 c . The hysteresis phenomenon has also been observed. In the investigations of Al nanocrystals embedded in alu- 16 minum nitride thin film, Liu et al. have reported that charging/discharging processes contribute to the phenom- 16 enon of the sharp changes in the conductance. If the argu- ment is also true for our experimental results, these current fluctuations are expected to be influenced by SiNCs charging situations. In other words, the characteristics of the current fluctuations should change with the measurement times as the charging situation of the SiNCs are randomly changed due to the charges trapping or detrapping process in each time measurement. Thus, we check those two times measurement results which are shown in Figs. 2 ͑ a ͒ and 2 ͑ b ͒ . The second time measurement results exhibit clearly different overall characteristics of I ds - V g curves and different number of the current peaks, as shown in Fig. 2 ͑ b ͒ . In addition, these current fluctuations are accompanied with both variations of the voltage spacing and the voltage shifts as shown in Figs. 2 ͑ a ͒ and 2 ͑ b ͒ and Fig. 3 ͑ b ͒ . Besides, these current fluctuations cannot be observed during the third time measurement, as shown in Fig. 2 ͑ c ͒ , when devices are applied Ϫ 5 V for 30 s before starting the measurement. The trapped charges ͑ which are induced during applying V ds = 5 V in the initial measurement and the second time measurement ͒ will be released when the opposite voltages are applied on the devices ͑ V ds = −5 V ͒ , as demonstrated in Figs. 4 ͑ a ͒ and 4 ͑ b ͒ . ͑ It has to mention that the trapped carriers’ effects on the SiNC band bending have not been considered in Fig. 4. ͒ Consequently, the charging situation of the whole SiNC thin film has been totally changed by applying Ϫ 5 V on the device for 30 s. Thus, based on experimental results described above, it can be concluded that the current fluctuations are greatly influenced by the changes of the SiNC charging situations. To explain these experimental results, we propose a model that the charging/discharging processes of the SiNCs existing in the intersection of several current paths is responsible for the current fluctuations. The conduction of whole SiNC thin films is dominated by these critical SiNCs with the ...
Context 3
... nanocrystals SiNCs , as one of the functional materials for nanoelectronics devices, have attracted much attention in recent years because of their electronic and op- 1 tical characteristics. Up to now, SiNCs memory devices due to its unique advantages have been widely investigated as the 2 descendant of flash memories. The light-emission devices based on SiNCs has also attracted great interest due to its 3 potential in realizing optoelectronic integrated circuits. Devices with a few SiNCs have been proposed as single elec- 4 tron transistors and nanoscale electrometers for quantum in- 5 formation processing. Moreover, SiNCs are expected to be used in the application of high efficiency electron emitters, 6 due to the low energy loss of emitted electrons. Investigation of carrier transport mechanism in SiNCs has attracted great interests, as it is essential to develop the device applications of SiNCs. In SiNCs, the phenomenon of 7 the conduction which is dominated by hopping conduction, 8 space charge limited current transport and Poole–Frenkel 9 type transport has been observed. Random charging/ discharging phenomenon also attracts much interest in the investigation of the metal-oxide-semiconductor and metal- 10,11 insulator-semiconductor devices with a few SiNCs. Besides, current fluctuations which are caused by single-hole charging/discharging in two-dimensional ͑ 2D ͒ Si multidots 12 have been reported by R. Nuryadi et al. However, up to now, there are few reports about the charging/discharging phenomenon in three-dimensionally ͑ 3D ͒ stacked SiNC thin films. Compared with the carrier transport situation in one- dimensional ͑ 1D ͒ or 2D multidots, the numbers of both the current paths and the nearest neighbors of each SiNC in 3D stacked SiNC thin films are much larger. Consequently, it is difficult to observe charging/discharging phenomenon in 3D stacked SiNC thin films due to the averaging effects by the peak superimposition or influences from the neighbor 12,13 SiNCs’ charging situations. In this letter, we report the observation of the current fluctuations in 3D stacked SiNC thin films based on the thin film transistor ͑ TFT ͒ structures. The transport mechanism is discussed in terms of the model that the whole SiNC thin films conduction is dominated by the charging situations of those critical SiNCs which exist in the intersection of the several current paths. The device structure used in this experiment is a SiNC TFT structure. A 110-nm-thick SiO 2 was formed as a gate dielectric layer by thermal oxidation on the highly doped n + -Si substrates with resistivity of 0.02 ⍀ cm. Then, sparse SiNC thin films, 150 nm in thickness, were deposited on the 14 SiO 2 layer using the very-high-frequency SiH 4 plasma cell. After the deposition, electrode patterns were fabricated by electron beam lithography with polymethyl-methacrylate as resist. Device fabrication process was completed by deposit- ing a 200-nm-thick Al layer using an e-beam evaporator and lift-off process. Both the source and drain contacts are Al Schottky contacts. The n + -Si substrate works as a backgate. The channel length is about 150 nm and the width 20 m, as shown in Fig. 1 ͑ a ͒ . The average size of each SiNC was controlled to be 6 Ϯ 1 nm with the flux of SiH 4 and Ar of 1.6 sccm and 90 sccm respectively with ϳ 2 W plasma power. Each SiNC is covered by an oxide shell, 1 – 1.5 nm in thickness as shown in inset of Fig. 1 ͑ b ͒ , formed by a natural oxidation process due to the exposure to the air. 6 Figure 1 ͑ b ͒ shows the scanning electron micrograph ͑ SEM ͒ of SiNCs. There are some voids in the SiNC film, which are caused by the spherical characteristics of the SiNCs. The variations in SiNCs local density are due to the random deposition of SiNCs on the substrates. Characteristics of the lateral conduction of SiNC films are investigated by I - V measurement at room temperature. The measurement of gate voltage V g dependence of drain- source current ͑ I ds ͒ starts from positive to negative gate voltages, at a drain voltage V ds = 5 V. Figure 2 shows the I ds - V g characteristics obtained by sweeping the V g from 5 to Ϫ 8 V with 0.25 V/s sweeping rate in the following situations: ͑ a ͒ start at the initial states ͑ without charging the SiNCs ͒ , ͑ b ͒ the second time measurement, 10 min after the initial measurement. During the 10 min waiting time, positive V ds bias was not maintained. ͑ c ͒ The third time measurement, after the second time measurement, V ds was applied Ϫ 5 V for 30 s. The period between the status of the V ds Ͻ 0 and the V g sweep is 10 s. Both Figs. 2 ͑ a ͒ and 2 ͑ b ͒ show that I ds exhibits clear fluctuations in certain V g region. The current peak spacing ͑ ⌬ V g ͒ randomly changes in the range of 600 to 950 mV. However, current fluctuations cannot be clearly observed during the third time measurement, as shown in Fig. 2 ͑ c ͒ . The current fluctuations have also been observed in I ds - V ds characteristics at certain V ds and V g regions, by measuring devices with the similar structure shown in Fig. 3 ͑ a ͒ . In this device structure, highly doped Si layer is used to form source and drain Ohimic contacts. The SiO 2 film, 200 nm in thickness, works as a back-gate insulator. SiNCs measured in the devices are deposited under the same deposition condi- tion as SiNCs previously measured. The measurement results exhibit n-channel characteristics, which are different from previous measurement results shown in Fig. 2. It may be 15 caused by the metals/SiNCs contacts. Here, we focus on the phenomenon of current fluctuations. The I ds - V ds characteristics show current fluctuations for a finite range of the V g ͑ 30–40 V ͒ and in both forward and backward sweep directions. It indicates that the current fluctuations in SiNCs are not always random events and the electric fields have the effects on the current fluctuations. The voltage spacing between each two neighbor current peaks are also different from each other. Moreover, there are voltage shifts between the current peaks measured in the forward and backward directions as shown in Fig. 3 c . The hysteresis phenomenon has also been observed. In the investigations of Al nanocrystals embedded in alu- 16 minum nitride thin film, Liu et al. have reported that charging/discharging processes contribute to the phenom- 16 enon of the sharp changes in the conductance. If the argu- ment is also true for our experimental results, these current fluctuations are expected to be influenced by SiNCs charging situations. In other words, the characteristics of the current fluctuations should change with the measurement times as the charging situation of the SiNCs are randomly changed due to the charges trapping or detrapping process in each time measurement. Thus, we check those two times measurement results which are shown in Figs. 2 ͑ a ͒ and 2 ͑ b ͒ . The second time measurement results exhibit clearly different overall characteristics of I ds - V g curves and different number of the current peaks, as shown in Fig. 2 ͑ b ͒ . In addition, these current fluctuations are accompanied with both variations of the voltage spacing and the voltage shifts as shown in Figs. 2 ͑ a ͒ and 2 ͑ b ͒ and Fig. 3 ͑ b ͒ . Besides, these current fluctuations cannot be observed during the third time measurement, as shown in Fig. 2 ͑ c ͒ , when devices are applied Ϫ 5 V for 30 s before starting the measurement. The trapped charges ͑ which are induced during applying V ds = 5 V in the initial measurement and the second time measurement ͒ will be released when the opposite voltages are applied on the devices ͑ V ds = −5 V ͒ , as demonstrated in Figs. 4 ͑ a ͒ and 4 ͑ b ͒ . ͑ It has to mention that the trapped carriers’ effects on the SiNC band bending have not been considered in Fig. 4. ͒ Consequently, the charging situation of the whole SiNC thin film has been totally changed by applying Ϫ 5 V on the device for 30 s. Thus, based on experimental results described above, it can be concluded that the current fluctuations are greatly influenced by the changes of the SiNC charging situations. To explain these experimental results, we ...
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Citations
... Similar to gallium chalcogenides, silicon nanocrystals (SiNCs) are also attractive because of their unique quantum behaviour [32], electrical and optical properties [33,34], room-temperature fabrication [35,36,37,38,39,40], and potential for low-cost mass production [41,42]. There are several promising applications of SiNC-based devices, such as single-electron transistors [43], light-emitting devices [44,45,46], optical interconnections [47], electron emitters [47], flexible display devices, thin film transistors [48], high-speed radio frequency identifications (RFIDs) [49], floatinggate memories [50], quantum information processing devices [51], and high-efficiency solar cells [52,53]. ...
... There are several promising applications of SiNC-based devices, such as single-electron transistors [43], light-emitting devices [44,45,46], optical interconnections [47], electron emitters [47], flexible display devices, thin film transistors [48], high-speed radio frequency identifications (RFIDs) [49], floatinggate memories [50], quantum information processing devices [51], and high-efficiency solar cells [52,53]. However, SiNC-based devices suffer from very low electrical conductivity [35,36,37,38,39,40] owing to the high surface reactivity of SiNCs, the large number of tunnelling barriers provided by each of the SiNCs along the conduction paths, and the formation of numerous voids inside the film. A native oxide layer with a thickness in the range of 1-2 nm is formed on the surface of SiNCs [39,40]. ...
... Electron transport in the film of SiNC ensemble is explainable as multiple tunnelling through the surface oxide layers [35,36,37,38,39,40]. The tunnelling probability decreases significantly when the number of tunnel barriers increases. ...
This thesis focuses on the fabrication and characterisation of silicon nanocrystal (SiNC), and two-dimensional gallium chalcogenides, namely, gallium selenide (GaSe) and gallium telluride (GaTe) for next-generation nanoelectronics and nanophotonics applications. In the first part, silicon nanocrystal (SiNC)-based thin-film devices have been fabricated, where the idea of scaling down of channel length was implemented in such a way that very few SiNCs can be fitted inside the channel in the channel length direction in order to decrease the number of barriers to increase electrical conductivity. In this study, we have demonstrated the scaling down of channel length to 20 nm in order to reduce the number of barriers provided by each of the SiNCs, which are fabricated using a very high-frequency (VHF) plasma-enhanced chemical vapour deposition (CVD) system with a diameter of 10 ±1 nm. A high electrical conductivity has been achieved by optimising channel length. In addition, we have demonstrated the surface nitridation of SiNCs to protect the highly reactive surface of SiNCs from further native oxidisation and successfully suppressed the degradation of transport properties. In the second part, we report on the nonlinear optical properties of few-layer GaTe studied by multiphoton microscopy. Second and third harmonic generation from few-layer GaTe flakes were observed in this study with the laser pump wavelength of 1560 nm. These processes were found to be sensitive to the number of GaTe layers. The second- and third-order nonlinear susceptibilities of 2.7 x 10-9 esu and 1.4 x 10-8 esu were estimated, respectively. In the third part, we have established Raman fingerprint of GaTe and GaSe to investigate their crystal quality. Unencapsulated GaTe (GaSe) oxidises in ambient conditions which are well detected in their Raman analysis. X-ray photoelectron spectroscopy (XPS) analysis of GaTe (GaSe) shows a good agreement with Raman analysis. 50 nm-thick Al2O3 deposited by atomic layer deposition (ALD) to encapsulate GaTe (GaSe) inhibits degradation in ambient conditions.
... Recently, silicon nanocrystals (SiNCs) have attracted much attention from researchers because of their unique quantum behavior, 1) electrical and optical properties, 2,3) room-temperature fabrication, [4][5][6][7][8][9] and potential for low-cost mass production. 10,11) There are many promising applications of SiNC-based devices, such as single-electron transistors, 12) light-emitting devices, [13][14][15] optical interconnections, 16) electron emitters, 16) flexible display devices, thinfilm transistors, 17) high-speed radio frequency identifications (RFIDs), 18) floating-gate memories, 19) quantum information processing devices, 20) and high-efficiency solar cells. ...
... However, SiNC-based devices suffer from very low electrical conductivity [4][5][6][7][8][9] owing to the high surface reactivity of SiNCs, the large number of tunneling barriers provided by each of the SiNCs along conduction paths, and the formation of numerous voids inside the film. Firstly, a natural oxide layer with a thickness in the range of 1-2 nm is formed on the surface of SiNCs. ...
... 8,9) Electron transport in the film of SiNC ensemble is explainable as multiple tunneling through the surface oxide layers. [4][5][6][7][8][9] The tunneling probability decreases significantly when the number of tunnel barriers increases. Secondly, SiNCs tend to aggregate and form large clusters with many voids, which prevent the formation of a closely packed array of SiNCs, resulting in voids in the film. ...
Silicon nanocrystal (SiNC)-based thin-film devices have been fabricated, where the idea of scaling down of channel length was implemented in such a way that very few SiNCs can be fitted inside the channel in the channel length direction in order to decrease the number of barriers to increase electrical conductivity. In this study, we have demonstrated the scaling down of channel length to 20 nm in order to reduce the number of barriers provided by each of the SiNCs, which are fabricated using a very high-frequency (VHF) plasma-enhanced chemical vapor deposition (CVD) system with a diameter of 10±1 nm. A high electrical conductivity has been achieved by optimizing channel length. In addition, we have demonstrated the surface nitridation of SiNCs to protect the highly reactive surface of SiNCs from further natural oxidization and successfully suppressed the degradation of transport properties.
... In recent years, silicon nanostructures have attracted enormous attentions. [1][2][3][4][5] Particularly, metal-insulatorsemiconductor (MIS) structures based on silicon quantum dots are widely studied for their new physical phenomena as well as their potential applications in future memory device. The first nanocrystals based MIS memory structure was put forward by Tiwari et al., where Si nanocrystals were used as storage nodes. ...
Nonthermal plasmas have emerged as a viable synthesis technique for nanocrystal materials. Inherently solvent and ligand-free, nonthermal plasmas offer the ability to synthesize high purity nanocrystals of materials that require high synthesis temperatures. The nonequilibrium environment in nonthermal plasmas has a number of attractive attributes: energetic surface reactions selectively heat the nanoparticles to temperatures that can strongly exceed the gas temperature; charging of nanoparticles through plasma electrons reduces or eliminates nanoparticle agglomeration; and the large difference between the chemical potentials of the gaseous growth species and the species bound to the nanoparticle surfaces facilitates nanocrystal doping. This paper reviews the state of the art in nonthermal plasma synthesis of nanocrystals. It discusses the fundamentals of nanocrystal formation in plasmas, reviews practical implementations of plasma reactors, surveys the materials that have been produced with nonthermal plasmas and surface chemistries that have been developed, and provides an overview of applications of plasma-synthesized nanocrystals.
The time evolution of the optical emissions of Ar plasma during silicon nanocrystal (SiNC) fabrication using a pulsed SiH4 supply is studied. The enhancement of Ar emission with a duration longer than the ON time of the pulsed SiH4 supply is observed owing to the formation of SiNCs in the plasma. This enhancement can be explained in terms of the increase in the number of high-energy electrons caused by electron attachments to SiNCs. The size and generation rate of SiNCs clearly correlate with the duration and intensity of the enhanced emission even when the Ar flow rate or the plasma power is changed. On the basis of this relationship, the size and density of SiNCs can be predicted during the fabrication by monitoring the enhanced emission.
The present study of deep level transient spectroscopy (DLTS) is focused on a comparison of the trap states in two types of Ge nanocrystallites (NCs)-insulator composites. The investigated systems were the dielectric matrices Al2O3 and SiO2 in which the Ge NCs were embedded. We have found couples of traps with related values of activation energies in both the Ge:Al2O3 and the Ge:SiO2 films. In the films with a relatively low Ge content (where only small NCs sized 3–5 nm could have been detected by means of Raman spectroscopy), we observed traps with an energy level ∼50 meV in the Ge:Al2O3 films and 120 and 50 meV in the Ge:SiO2 films. In both systems, we found that the electron traps have a small carrier capture cross-section (10−21–10−23 cm2). We have identified the levels of the traps to be the quantum confinement levels in the small Ge NCs. For samples of higher Ge contents, where the NC size reaches about 20 nm and where an appreciable portion of the dielectric matrix consists of amorphous Ge (α-Ge), we found traps with an energy of 0.22–0.24 eV in the Ge:Al2O3, and 0.26–0.27 eV in the Ge:SiO2 samples. We suggest that this peak in the charge DLTS (Q-DLTS) spectra is associated with a trap at the Ge-NC/α-Ge interface. We have also identified the energy position of a defect level in the Ge:Al2O3 layers, which lies 0.46–0.49 eV below the conduction-band edge of the Si substrate.
The frequency and direction dependence of transmission coefficients at interfaces was investigated theoretically. The interfaces are formed by having two Lennard-Jones materials differing in mass and interatomic potential equally divided at the center of an fcc lattice system. A single frequency wave-packet is generated at one end of the system and allowed to propagate through the system until all interactions with the interface are complete. The transmission coefficient is then calculated by comparing the energy of the packet that is transmitted with the original wave-packet. Results show a difference in transmission when the wave-packet originates from opposite sides.
