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Circuit schematic of proposed topology adapted from Mythry and Moni (2018)

Circuit schematic of proposed topology adapted from Mythry and Moni (2018)

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Modern-day biomedical science and technology have progressed with implantable neural recording systems. There is a demand for miniaturised devices that can be emplaced into the brain for an efficient neural recording process. In contrast to the commercial gadgets, the design of implantable devices is critical, as they are placed in vital regions of...

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... In the latest trends, researchers are working on developing devices that are smaller in size and consume less power for use in healthcare applications. [1][2][3][4] Neural signals having a low frequency range (0.1-100 Hz) are continuously analyzed in wearable biological healthcare applications for developing neuro-prosthetic systems and recognizing neurological disorders. [5][6][7][8] The importance of continuous-time low-pass filters (LPFs) is growing in the development of neuro-prosthetic systems. ...
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In this article, a fourth-order low-pass filter (LPF) is designed and analyzed for wearable biological healthcare applications. The proposed LPF is based on level shifter, class-AB folded flipped source follower, and pseudo-resistive voltage-variative approaches, which increases its power efficiency. The proposed LPF consumes 0.279 nW of power with a figure of merit of 2.13 × 10⁻¹⁵ J in CMOS 180 nm process. Furthermore, the post-layout simulations executed for the proposed LPF show a gain of −0.126 dB, a bandwidth of 100 Hz, total harmonic distortion (THD) of −48.53 dB, and a dynamic range (DR) of 50.19 dB. In addition to this, the Monte Carlo simulations with 200 samples demonstrate the corresponding mean and standard deviation values for gain (−0.282 and 0.517 dB), DR (50.18 and 0.025 dB), and THD (−46.175 and 3.258 dB). The proposed fourth-order LPF is a perfect match for wearable biological healthcare systems that are portable and safe.
... The CMOS analog circuits like programmable gain amplifiers, active filters, data converters, and modulators with stringent power supply conditions require linear operational transconductance amplifier (OTA) circuits (Kulej et al. 2022;Colletta et al. 2014;Saini et al. 2021;Elamien and Mahmoud 2017;Laskar et al. 2021;Pribadi et al. 2022;Nath et al. 2021;Devi et al. 2022;Kao et al. 2018). Along with linear performance, these OTAs must be capable of operating at sub 0.5-V supply voltage for applications like health monitoring, biosignal detection and earthquake prediction systems where frequency of signal of interest lies between 0.1 and 10 kHz (Sharma and Sharma 2019;Mudgil et al. 2012;Sharma and Sharma 2017;Bhattacharya 2022). ...
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The CMOS analog circuit blocks targeted for low frequency applications require linear operational transconductance amplifier (OTA) with stringent power supply conditions for delivering low-power operation. However, achieving acceptable linear performance of OTAs with stringent power sup ply conditions is a difficult task in CMOS technology. A linear non-tailed, class AB OTA using double linearization resistors and diode-connected MOS biasing techniques is presented which operates at 0.3 V supply voltage. The proposed linear OTA shows transconductance of 3.1 µS, DC gain of 19.28 dB, gain bandwidth of 16.5 kHz, input referred noise of 0.475 µV/√Hz, total harmonic distortion of-42.03 dB over input voltage range of 128 mVpp for frequency of 1kHz and consumes 0.516 µW of power. The calculated figure of merits are superior for proposed linear OTA in contrast to earlier reported OTA design and single linearization resistor based non-tailed, class AB OTA. The corner and statistical analysis of proposed OTA confirms its suitability for possible use in analog circuits and systems targeted for low frequency applications.