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This paper presents a LC-based sub-harmonic injection-locked frequency quadrupler which multiplies a 15 GHz input to 60 GHz quadrature(I/Q) output signals. The proposed quadrupler can use a lower-frequency PLL for incident signal than doublers and triplers, which is very advantageous to implement a wide-tuning and low-phase-noise PLL. The proposed...
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Citations
... The injection locked frequency quadrupler with quadrature outputs [15] shows rather limited locking range. The injection locked frequency quadrupler [16] as shown in Fig. 2(b) cascades two injection-locked frequency doublers. These ×4 ILFM's use multi-stage approach. ...
... In the past, many ×4 ILFM's have been implemented. [15], [16], [18]. One ×4 ILFM consists of a cross-coupled injection-locked oscillator [19], [20]. ...
This paper designs a C-band single-stage
$LC$
-tank injection locked frequency quintupler (ILFQ) fabricated in
$0.18~\mu \text{m}$
CMOS process. The differential input/output ILFQ circuit is made of a first-harmonic injection-locked frequency oscillator (ILO) and a frequency quadrupler/quintupler. The free-running oscillation frequency of the ILFQ is around 7.6 GHz. At the dc power consumption of 9.9 mW and at the incident power of 0 dBm, the input locking range is from the incident frequency 1.456 GHz to 1.644 GHz to provide an output signal source from the frequency 7.28 GHz to 8.22 GHz. The whole chip occupies a die area of
$1.114\times 1.060$
mm
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. The designed circuit is also used as a new X-band single-stage
LC
-tank injection locked frequency quadrupler, which shows measured
$\times 4$
output locking range from 7.82 GHz to 8.6 GHz.
... The RF front-end employs a direct-conversion architecture. A wide frequency coverage and low phase-noise performance are realized by an injection-locked oscillator [2], [3], [18], consisting of a 20-GHz PLL and a 60-GHz quadrature injection-locked oscillator. The transmitter and receiver have two independent 6-dBi antennas, which are embedded in a generic organic ball-grid array (BGA) package [19], [20]. ...
... Each amplifier has a wideband matching block for covering the four channels defined in the 60-GHz wireless standards, such as IEEE 802.11ad [4]–[8]. The 60-GHz QILO works as a frequency tripler with an integrated 20-GHz PLL [2], [3], [18], and generates 58.32, 60.48, 62.64, and 64.80 GHz with a 36-MHz reference. ...
This paper presents a 60-GHz direct-conversion RF front-end and baseband transceiver including analog and digital circuitry for PHY functions. The 65-nm CMOS front-end consumes 319 and 223 mW in transmitting and receiving mode, respectively. It is capable of more than 7-Gb/s 16QAM wireless communication for every channel of the 60-GHz standards, which can be extended up to 10 Gb/s. The 40-nm CMOS baseband including analog, digital, and I/O consumes 196 and 427 mW for 16QAM in transmitting and receiving modes, respectively. In the analog baseband, a 5-b 2304-MS/s ADC consumes 12 mW, and a 6-b 3456-MS/s DAC consumes 11 mW. In the digital baseband integrating all PHY functions, a (1440, 1344) LDPC decoder consumes 74 mW with the low energy efficiency of 11.8 pJ/b. The entire system including both RF and BB using a 6-dBi antenna built in the organic package can transmit 3.1 Gb/s over 1.8 m in QPSK and 6.3 Gb/s over 0.05 m in 16QAM.
A novel approach to implement mixer-based frequency doublers is proposed in this article. By driving the two ports of a Gilbert-cell with in-phase signals, but reducing the switching-quad duty-cycle, the output current assumes square-wave shape at twice the input frequency, with enhanced harmonic conversion gain and free of DC offset. By avoiding the need of quadrature-signals generation, commonly required in multiplier-based frequency doublers, the performance advantage of the proposed approach is intrinsically broadband. The switching-quad duty-cycle is reduced by biasing the switching-quad transistors with a DC offset automatically regulated by a simple low-frequency loop. The article includes a detailed discussion of the operation principle, an analysis of the robustness to impairments, and thorough design considerations. The performance of the proposed architecture is finally compared against a conventional quadrature-driven Gilbert-cell doubler designed and implemented with the same technology. Realized in a SiGe-BiCMOS process, and operating at 1.5 V supply voltage, the doubler achieves state-of-the-art conversion gain (6 dB),
${P_{\rm sat}}$
(5.7 dBm) and efficiency (17%). The operation bandwidth, of more than one octave (14–32 GHz), demonstrates a remarkable improvement against previous works.
This article demonstrates a
$W$
-band local-oscillator generation technique in 120-nm SiGe BiCMOS technology with high output power and high efficiency. The circuit employs a frequency quadrupler that is driven with differential quadrature inputs that are provided by either a quadrature voltage-controlled oscillator (QVCO) or a tunable active polyphase filter (PPF) circuit. The quadrupler employs a phase-controlled quadrature-push (PCQP) topology using stacked devices with a lower class-C common-emitter (CE) amplifier generating a current that is then modulated by an upper common-base (CB) amplifier driven out-of-phase with the lower devices. Such a structure generates a strong fourth-order harmonic. Four such stacks driven at their input using accurate differential quadrature signals increase the fourth-harmonic output power while suppressing other harmonics. The differential quadrature signals for the quadrupler are provided using either a PPF circuit or a capacitive injection-locking QVCO, which achieves wide tuning range and low phase noise. Both approaches are evaluated through the measurement of separate test circuits. The LO circuit using the QVCO provides 8–11.5-dBm output power over 75.2–83 GHz, power efficiency of 2.2–4.1%, including QVCO and buffer power, >20-dB harmonic rejection in the lower frequency range, and >14.4-dB harmonic rejection in the upper frequency range. The LO circuit using the active PPF provides 8.4–11.2-dBm output power over 75.6–82.8 GHz, power efficiency of 2.4–4.8%, including PPF and buffer power, and >23-dB harmonic rejection.
In this brief, a millimeter-wave (mm-Wave) wideband frequency quadrupler is demonstrated in a 55-nm CMOS technology. It cascades two injection-locked frequency doublers (ILFD). Each of them consists of an oscillator gain stage realized by an injection-locked oscillator (ILO) and a frequency doubler implemented by a push-push pair. A tail feedback loop is proposed and applied in the second ILFD. It effectively boosts the injection current for the second ILFD. Therefore, both the operating bandwidth and output power (Pout) of the circuit are prominently improved. In addition, transformer-based high-order resonators are used to reduce the phase variation of their impedance around 0° and hence extend the locking range of ILOs. According to the measurement results, a frequency range of 30.8 ~ 40 GHz is achieved. The maximum Pout is up to -7.1 dBm without additional buffers. The circuit also attains a wide 3-dB frequency bandwidth of Pout, which is from 32 to 38.4 GHz. The harmonic rejection ratios of the frequency quadrupler are 16.5 ~ 25.9 dBc at the second-order harmonic and 31 ~ 45 dBc at the fundamental and third-order harmonics over the entire operating bandwidth. The core area occupies only 0.24 mm
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.
In this article, a novel 90-nm gate length CMOS injection-locked frequency tripler that generates the 77 GHz output signal is proposed. The output signal frequency of proposed tripler could be locked precisely by using a one-third frequency local oscillator, which is beneficial for obtaining a wide tuning range and a low-phase-noise performance. In addition, the slow wave elevated-center coplanar waveguide transmission lines were adopted to reduce the chip size. The locked output frequency range is from 77.34 to 80.32 GHz together with a phase noise of −83.24 dBc/Hz at 1 MHz offset. The 0.81 mm2 tripler (including passives) consumes 6.52 mW DC power under a 1.2 V voltage supply. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 55:434–439, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.27336
