Block diagram of a PLL-based indirect frequency synthesizer.

Block diagram of a PLL-based indirect frequency synthesizer.

Source publication
Article
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Fractional- $N$ frequency synthesizers are characterized by unwanted periodic components in their frequency spectra called spurs. In communications applications, spurs reduce the signal to noise ratio of the system; in clocking they add jitter; in radar and imaging, they can present ghost targets. Some spurs are due to parasitic electromagnetic co...

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... are typically used as clocks in wired systems and as modulation and carrier signals in wireless communications. The most common way to synthesize a frequency is by indirect synthesis [1]. A phase locked loop (PLL), which incorporates a frequency divider, is used to lock the output of the synthesizer to an accurate reference frequency, as shown in Fig. 1. The reference signal ref is normally a squarewave derived from crystal ...

Citations

... This transfers the system's nonlinearity and dynamic range concerns from the TDC to the DTC. It is known that the accumulated DDSM QE followed by a nonlinear function yields spurious tones in the power spectrum, which can be transferred to the output of the system to deteriorate the overall PN performance [11]- [14]. These are referred to as "fractional spurs" and normally appear at integer multiples of N frac · F ref , where N frac is the fractional part of N and F ref is the reference frequency. ...
Conference Paper
Fractional−N digital phase locked loops (DPLL’s) typically use a digital-to-time converter (DTC) to cancel the quantization error (QE) produced by the divider controller that is typically a digital Δ−Σ modulator (DDSM). In practice, the nonlinear transfer characteristic of the DTC interacting with the accumulated QE of a conventional Multi-stAge noiSe-sHaping (MASH) DDSM causes fractional spurs which deteriorate the system’s output phase noise performance. The Enhanced Nonlinearity-induced nOise Performance (ENOP) DDSM exhibits fractional-spur immunity when interacting with nonlinearities that can be modeled by polynomial functions. This paper compares the generation of fractional spurs when using MASH and ENOP DDSMs respectively. The application of the latter in a DPLL is shown to successfully mitigate the fractional spurs. Block and system level behavioral simulations underpin our observations.
... Spurs are unwanted periodic components of the spectrum. Spurs can reduce the signal-to-noise ratio of a wireless communication system and increase signal jitter [28]. For both the passive fourth-order RC and RLC filters, the spur suppression of a signal is evaluated with an output frequency of 1426 MHz. ...
... Since the output frequency is not an integer multiple of the reference frequency, the fractional-N frequency synthesizer necessarily outputs spurious signals [28]. The division ratio modulated by the frequency divider causes the quantization noise. ...
Article
Full-text available
The current work employs the HMC830 phase-locked loop chip to design a frequency synthesizer operating in the L-band. The frequency synthesizer can provide a local oscillation signal for the RF receiver front end. This article employs the phase-locked synthesis technique to describe the design scheme. Due to the advantages of the passive loop filters, such as simplicity, low cost, and low phase noise, a passive fourth-order RLC loop filter is proposed to improve the output signal quality and reduce phase noise. The performance of this loop filter is compared with the passive fourth-order RC loop filter. The effects of these two loop filters on phase noise, loop capture time, and spur suppression are analyzed. Subsequently, the design scheme, simulation analysis, and test results of the frequency synthesizer are presented under these two loop filters. The test results indicate that the passive fourth-order RLC loop filter outperforms the passive fourth-order RC loop filter; its output signal phase noise is higher than −100 dBc/Hz@1 kHz, loop capture time is less than 100 us, and spur suppression is better than 60 dBc. This frequency synthesizer can provide high-performance local oscillation signals for wireless communication equipment such as transmitters and receivers. It meets the application requirements of many radio communication circuit structures and has good application prospects.