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In order to guarantee the Quality of Service (QoS) requirements of multimedia network, based on the concept of Software Defined Networking (SDN) and OpenFlow protocol, this paper presents the hardware and software co-design of a configurable QoS scheme for video streaming. Specifically, we present the architecture of an OpenFlow switch where the al...
Citations
... In [13], a survey has been carried out on the design issues of SDN/OpenFlow. In this study, networks show that SDN can be applied in different sections of networking, including developing new protocols before they are being implemented in real networks. ...
Software-Defined Network (SDN) is a networking opportunity that brings together all control functions in one place and changes traditional network architecture by making centralized decisions. In SDN architecture, controllers perform control decision-making functions when directing packets. Unlike traditional routing protocols, efficient r outing protocols are required for efficient data center infrastructure services. The separation of the network data plane from the network control plane is advocated by SDN in a networking design concept. Traditional networks mix data and control planes on the same device and forcing each device to make its own routing decisions based on distributed routing protocols. In this paper, we develop Microsoft Azure Software Defined-Wide Area Networks (SD-WAN) with the concept of HUB-SPOKE to show how the controller’s centralized decision-making capability changes network architecture with network flexibility and programming capability by taking the SPOKE network. This research also focuses on the key status of controllers used in the network industry. Further, we analyze the performance of SD-WAN routing against conventional routing with respect to routing convergence time and address how much efficient SDN routing rather than the conventional routing in various network topology using real-time SD-WAN on corporate environment of Microsoft Azure Cloud Tenant.
... Virtual switches are software-based switches that run on a common operating system (OS), examples of virtual switches are Open vSwitch [40], Pantou [41], and Indigo [42]. Physical switches are hardware-based switches, implemented either on open network hardware such as NetF-PGA [43], or on a merchant switch from networking hardware vendors. ServerSwitch [44] and switchBlade [45] are two examples of NetFPGA-based physical switches. ...
In recent years, rapid development has been made to the Internet of Things communication technologies, infrastructure, and physical resources management. These developments and research trends address challenges such as heterogeneous communication, quality of service requirements, unpredictable network conditions, and a massive influx of data. One major contribution to the research world is in the form of software-defined networking applications, which aim to deploy rule-based management to control and add intelligence to the network using high-level policies to have integral control of the network without knowing issues related to low-level configurations. Machine learning techniques coupled with software-defined networking can make the networking decision more intelligent and robust. The Internet of Things application has recently adopted virtualization of resources and network control with software-defined networking policies to make the traffic more controlled and maintainable. However, the requirements of software-defined networking and the Internet of Things must be aligned to make the adaptations possible. This paper aims to discuss the possible ways to make software-defined networking enabled Internet of Things application and discusses the challenges solved using the Internet of Things leveraging the software-defined network. We provide a topical survey of the application and impact of software-defined networking on the Internet of things networks. We also study the impact of machine learning techniques applied to software-defined networking and its application perspective. The study is carried out from the different perspectives of software-based Internet of Things networks, including wide-area networks, edge networks, and access networks. Machine learning techniques are presented from the perspective of network resources management, security, classification of traffic, quality of experience, and quality of service prediction. Finally, we discuss challenges and issues in adopting machine learning and software-defined networking for the Internet of Things applications.
... Naturally, we cannot exceed the performance more than that, and achieving performance close to 10G verifies that the implemented switch can catch up the speed of the physical port, that is the line-rate. Most of the state-of-theart architectures implemented on NetFPGA such as [28][29][30], ONetSwitch [1] and DPPSN [31] show the same performance outcomes. Fig. 9 also shows the same trend, in which the latency outcomes of both the switches do not differ considerably. ...
... The resources are compared in terms of LUTs, LUTRAM, FFs (Flip Flops) and DRAM. As compared to other state-of-the-art hardware switch platforms NetFPGA 1G and 10G, the resources consumptions as measured in [29], our model consumes less resources. The power consumption overhead can be calculated from Fig. 10 (a, b). ...
Today, data center networks (DCNs) are built using multi-tier architecture. These large-scale networks face many challenges, such as security, delay, low throughput, loops, link oversubscription, TCP Incast and Outcast, etc. In this paper, a TCAM (Ternary Content Addressable Memory) based routing technique is proposed, augmenting the routing capabilities of multi-tier architectures in large scale networks. The routing complexities in these architectures are rectified and improved by implementing an additional TCAM based routing table in Leaf/ToR switches for a specific number of compute nodes in particular Pods, and it is scalable to whole datacenter nodes. To test the model, we implemented two prototype models: one depicting our proposed TCAM based switch and the other is a typical Top-of-the-Rack (ToR) switch and compared the performance of the proposed model and if any overhead introduced in it. The preliminary results show that our TCAM based routing table technique is fast and it forwards the network packets at line-rate, does not introduce considerable latency, on-chip resources power consumptions is less than 3%, and helps to solve or mitigate the above critical problems that are present in the current large DCs three-tier architecture, especially in Top of the Rack and aggregation layers switches.
... The onboard resources include the SRAM and a generalpurpose JTAG test port. In Ref.29, Chu et al. proposed the implementation of OpenFlow switches on the NetFPGA platform, which utilizes two flow table memory structures including the accurate table lookup strategy based on SRAM and the TCAM-based wildcard table lookup.Meanwhile, NetFPGA developers have also devised two sets of hardware architecture solutions for gigabit Ethernet switches and IPv4 routers. In this section, we analyze the hardware resource consumption statistics of the designed POF switch, including the parameters Slices, LUTs, and BRAMs, and compare them with reference designs such as those of ethernet switches, IPV4 routers, and OpenFlow switches. ...
As the core computing chip of network equipment, network processor can complete the essential services such as routing lookup, high-speed packet processing, and QoS guarantee. Facing the transformation of network environment brought by ultra-high bandwidth and intelligent terminal, the design of the next generation network processor (NGNP) with high performance and evolution is a hot issue in the field of network communication, which is widely concerned by scholars. Combining the advantages of different chip architectures and high-speed services, NGNP has the characteristics of accelerating packet processing, dynamic configuration of hardware resources, and intelligent service application. In this study, the existing research is analyzed and compared from the design of NGNP which using new programmable technology, new network architecture oriented and for new high-performance service. The industrialization process of NGNP is summarized. Finally, the high performance evolvable network processor
(HPENP) architecture is proposed. By introducing the hardware and software collaborative packet processing pipeline, multi-level cache and packet scheduling, resource management and programming interface, the details of HPENP design are given and a prototype system is developed and its performance is tested. In this study, the development direction and intelligent application scenario of autonomously controlled network processor architecture are confirmed, and the possible research direction in the future is discussed.
In today’s Internet, killer network services and applications such as video and audio streaming, network storage, and online video games are pushing the network infrastructure resources to the edge. By design and for the most part, the Internet is best offer delivery ecosystem with little or no end-to-end Quality of Service (QoS) guarantees. Even, frameworks such as IntServ and DiffServ that were designed and implemented to provide QoS guarantees still fail to solve this problem at a wide scale. Software Defined Networking (SDN) is a fast emerging networking paradigm that promises to provide end-to-end QoS guaranteeing by offering greater network flexibility, abstraction, control and programmability to network resources. In this article, we review, survey, and discuss the current state-of-the-art on QoS provisioning in the area of SDN, with respect of applying the concept of Autonomic Computing (AC) to automatically support, provision, monitor and maintain QoS requirements. The article includes in-depth classification, taxonomy, and comparative analysis for autonomic-based QoS provisioning in accordance with the famous influential and widely adopted Monitor-Analyze-Plan-Execute-Knowledge (MAPE-K) IBM architectural model for autonomic computing.
