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For energy harvesting applications, a power management unit (PMU) architecture operating at low input voltages is required. The most critical sub-blocks of such a PMU are the voltage multiplier and the low-voltage clock generator. An ultra-low-voltage exponential gain charge pump (ECP) that serves as a voltage multiplier for such PMUs is analyzed....
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... also increases the average energy harvested from a TEG, especially in applications where the temperature difference is only a few degrees. A conceptual block diagram of a PMU is shown in Figure 1 [1]. The PMU contains a DC/DC converter with a variable conversion factor and a feedback circuit. ...
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Citations
... In the modern era, the utilization of portable devices is progressing due to reduced power consumption. In the nanometre-scale technology, still there is continuous demand for minimizing the power consumption and supply voltage of integrated circuits (IC) [1,2]. But, there exists several applications such as EEPROM programmers, MEMS devices, power switches and line drivers [3] that need high voltage to perform its operation. ...
This paper presents an enhanced complimentary metal oxide semiconductor (CMOS) charge pump (CP) circuit with improved gain and efficiency by dynamically controlling substrate and gate terminals of PMOS transistor. The proposed novel charge pump provides good performance even at low voltage. But, the efficiency of the charge pump circuit is being influenced by body effect and threshold voltage as the number of stage increases. Hence, numerous charge pump strategies are used to minimize the effect of threshold voltage and body effect. In this paper, the above-mentioned issues are overcome by implementing charge pump circuit in 180-nm standard in Cadence Virtuoso operated at low-voltage CMOS technology. From the result obtained, it is analyzed that the proposed CMOS charge pump achieves an improved voltage conversion ratio, efficiency and low operating voltage as compared to existing conventional CMOS charge pumps.
... Since the selection of proper voltage converter depends on the input source as well as its output impedance and output voltage, many works based on the different approaches can be found in the literature [24][25][26][27][28][29][30][31][32][33][34]. From Tab. 2, one can observe that if the input voltage value is equal to or lower than the threshold voltage of MOS transistor, in most cases, the efficiency of a voltage converter will not be more than 65 %. ...
... In [33], the input voltage is limited to 600 mV and this value is given by the threshold voltage of transistors in used CMOS 350 nm technology. On the other hand, in [30], [31] the input voltage is about 150 mV because these converters are implemented in 65 nm technology that offers transistors with a lower value of the threshold voltage. ...
In this paper, a novel bulk-driven cross-coupled charge pump designed in standard 90 nm CMOS technology is presented. The proposed charge pump is based on a dynamic threshold voltage inverter and is suitable for integrated ultra-low voltage converters. Due to a latchup risk, bulk driven charge pumps can safely be used only in low-voltage applications. For the input voltage below 200 mV and output current of 1 mu A, the proposed bulk-driven topology can achieve about 10 % higher efficiency than the conventional gate-driven cross-coupled charge pump. Therefore, it can be effectively used in DC-DC converters, which are the basic building blocks of on-chip energy harvesting systems with ultra-low supply voltage.
... The reason for different types of photovoltaic cell, materials and structure is to extract maximum power from the cell and to maintain cost to a minimum. According to efficiency above 30% have been achieved in laboratory and efficiency of practical application is usually less than half of that value [6]. Crystalline silicon technology is well certified and its cell is more expensive but still controls a major part of the photovoltaic market with efficiency approaching 18%. ...
Energy production and consumption in the future may depend on renewable energy sources and also depends on the efficiency of utilizing it. Here, a hybrid system, a combination of solar cells and thermoelectric generators is controlled by open circuit voltage method which is normally used for linear electrical characteristics. The proposed system is supported by theoretical analysis and simulation. Lead acid battery is used to accumulate the harvested energy. Cuk converters are used here to improve the efficiency and helps in reduction of noises. Hybrid generators are found to be efficient and more stable.
... As systems continue to increase in power density, battery life lags behind these needs. One possible solution lies in energy harvesting (EH), which presents itself as a means of increasing battery life and sustaining up-time for the wireless sensor node to a theoretical never-ending power supply [1]- [6]. Energy processing circuits designed to work at ultralow power levels have been developed for a variety of energy sources such as vibrational, solar, radio frequency, and thermal. ...
This paper presents a built-in input matching technique capable of handling a wide variation of multi-array thermoelectric generator (TEG) impedances ranging two decades, from 10 s to 1000 s of ohms. Maximum power point tracking (MPPT) control for a boost converter (BC) is introduced. The analytical expressions derived offer insight on the manner in which MPPT interacts with a BC to achieve best performance. The BC operates in a discontinuous conduction mode under pulse frequency modulation to minimize power consumption and maximize efficiency for light loads. Losses are minimized by implementing a pseudo-zero current switching control via the PMOS switch on/off time, and the output voltage is set using a global clocked comparator. A prototype was fabricated in 0.5 $muhbox{m}$ CMOS where efficiency measurements showed a maximum value of 61.15% for an $R_{TEG} = 33.33 Omega$, and quiescent power consumption was 1 $muhbox{W}$.
... D ESPITE the continuous demand for reducing the supply voltage and the power consumption of integrated circuits (IC) [1], [2], there are some applications that still require high-voltage operation, such as MEMS devices, EEPROM programmers [3]- [8], power switches [9], and LCD and line drivers [10]. To meet the high-voltage requirement, capacitive charge pumps (CPs) are used in light-load applications, whereas step-up dc-dc converters are used in heavy-load applications [11]- [17]. ...
... To meet the high-voltage requirement, capacitive charge pumps (CPs) are used in light-load applications, whereas step-up dc-dc converters are used in heavy-load applications [11]- [17]. Most of CP topologies in the literature [2], [18]- [20] are based on the Dickson CP [21], which is shown in Fig. 1, where the output voltage is given by (1) where N is the number of stages, V IN is the input voltage, and V ti and V to are the threshold voltages of the ith stage (where i = 1, 2, . . . , N) and the output stage, respectively. ...
In this paper, two high-voltage charge pumps (CPs) are introduced. In order to minimize the area of the pumping capacitors, which dominates the overall area of the CP, high-density capacitors have been utilized. Nonetheless, these high-density capacitors suffer from low breakdown voltage, which is not compatible with the targeted high-voltage application. To circumvent the breakdown limitation, a special clocking scheme is used to limit the maximum voltage across any pumping capacitor. The two CP circuits were fabricated in a 0.6- μm CMOS technology with poly0-poly1 capacitors. The output voltage of the two CPs reached 42.8 and 51 V, whereas the voltage across any capacitor did not exceed the value of the input voltage. Compared with other designs reported in the literature, the proposed CP provides the highest output voltage, which makes it more suitable for tuning MEMS devices.
... This in turn deactivates the startup circuit, and the energy almost exclusively flows into the main circuit. An exponential-gain charge pump (ECP) architecture with CMOS switching devices operating in the subthreshold mode was devised for that purpose in previous related work [3]. ...
... A proposed startup circuit including an exponential-gain charge pump has been presented in [3]. The designed exponential-gain charge pump architecture is functional, with acceptable power loss, for input voltages as low as 150mV. ...
... The main achievement is the almost three-fold reduction in the startup voltage of the PMU, with comparable power transfer efficiencies. Moreover, some of the circuit simulation results for the startup section were previously reported in [3]. ...
In this paper, an efficient ultra-low-voltage PMU working for TEG input voltages as low as 200mV is proposed. The PMU core, charging an energy buffer, employs a main DC/DC converter. It consists of a cascade of two Dickson-based charge pumps with a variable conversion factor and switching frequency. Feedback is provided from the load buffer by means of a current sensor to a control unit that maximizes the overall power transfer efficiency at low input voltages. System simulation results demonstrate a peak efficiency greater than 70% with a controller current consumption less than 2μA. The PMU core was simulated in Cadence environment using a UMC CMOS 180nm process and the layout of the basic core building blocks is presented. The fully-integreable design consumes an area of approximately 30mm2.
This paper presents a fully integrated power management system suited for AC/DC micro-scale energy harvesting applications. The system employs a CMOS rectifier followed by a DC-DC charge pump (CP) and a capless low dropout regulator (LDO) to provide a regulated output voltage of
$1.5~V$
. The proposed CP can provide a fractional voltage conversion ratio in a step of
$0.25$
to support wide AC/DC input range from
$0.4-1.5V$
in the DC mode and
$0.6-1.6V_{peak}$
in the AC mode. The system efficiency is optimized using real-time monitoring of the input current supplied to the CP. The proposed system is reconfigurable, with the aid of a finite state machine, to maximize end-to-end efficiency. This is achieved by adaptively optimizing the number of stages and switching frequency that provides the required output voltage. The proposed system is implemented in
$180$
nm CMOS technology and utilizes a total on-chip flying capacitance of
$2.4nF$
. Measurement results show that for DC operation, the system achieves a peak efficiency of 74% at a total output power of
$1.1mW$
. For AC operation, the system is designed with a rectifier peak efficiency of 84.2% and a total end-to-end efficiency of 58.6%.
We developed a 0.35-V inductorless DC-DC converter using non-SOI CMOS technology. To activate a ring oscillator circuit at an input voltage of 0.35 V, we deployed depletion-mode NMOS transistors in a ring oscillator. Generated 0.35-V clock signals were boosted to nominal 0.7-V clock signals by voltage doubler circuits using depletion-mode NMOS transistors. Finally, these clock signals were used in a boosted-gate charge pump circuit. Through SPICE simulations, we verified that our DC-DC converter generated an output voltage of 3.8 V at an input voltage of 0.35 V. The load current was 1.6 uA, and the total power consumption was 56 uW.
An efficient control of the gate voltage of switches that operate outside the supply range is a problem that occurs in circuits such as step-up DC/DC converters and stimulation circuits for implantable devices. This paper proposes solutions to this problem, using as case study a 3x, ultra low-power, step-up DC/DC converter with series–parallel architecture. The proposed gate control strategy minimizes the gate swing of the switches and recycles the gate charge in one of the cases, thus reducing the energy spent in driving the switch. The designed converter achieves an 81 % simulated efficiency (including all the required signal generation, except for the feedback loop) at \(V_{in}=400\) mV and \(5\;\upmu\)A load current and operates down to \(V_{in}=200\) mV.
