Figure 15 - uploaded by J. Martos
Content may be subject to copyright.
Download
View publication
Architecture of an embedded system "software" based on PicoBlaze (picture courtesy of Xilinx). 

Architecture of an embedded system "software" based on PicoBlaze (picture courtesy of Xilinx). 

Source publication
Figure 1. Virtex II internal block diagram. 
Figure 2. Virtex II memory block distribution and interface. 
Figure 3. Input/output blocks architecture. 
Figure 4. Improvements included in Virtex-II Pro model. 
+23 Figure 5. Performance comparison between programmable DSP and...
Design of Digital Advanced Systems Based on Programmable System on Chip
Chapter
Full-text available
  • May 2017
This chapter fills up an advanced analysis of the state-of-the-art design in programmable SoC systems, giving a critical overall vision for every designer to implement real time operating systems and concurrent processing. The content of the chapter is divided in the next four main sections. • First the evolution timeline of FPGA based systems is...
Cite
Download full-text

Similar publications

Fig. 2. Proposed SCA-aware design flow for FPGA targets. Newly added...
Fig. 5. Zero Variance (on post implementation traces) scenario as in...
Fig. 6. Signal Domination example for each one of the side channel...
Fig. 7. Zero Variance (post synt.) example for each one of the side...
+1 Fig. 8. Signal Isolation example for each one of the side channel...
Integrating Side Channel Security in the FPGA Hardware Design Flow
Conference Paper
Full-text available
  • Oct 2020
Abstract. The design of digital systems has its mainstay in the electronic design automation flows which act as crucial instruments to reduce the effort to realize complex computing platforms. In this work, we investigate the possibility of integrating side channel security analyses within the existing FPGA design flow, to provide a feedback to the...
View

Citations

Novel Instrument for Temperature Measurements in Borehole Heat Exchangers
Article
  • Aug 2018
  • IEEE T INSTRUM MEAS
The thermal response test (TRT) is the standard method for characterizing the thermal properties of the ground and those of a borehole heat exchanger (BHE). During the TRT, the inlet and outlet temperatures of the BHE are monitored. However, this test typically considers the ground as a homogeneous, isotropic, and infinite media, and therefore, it only determines the bulk and effective parameters, such as effective thermal conductivity and thermal borehole resistance. Hence, the enhanced TRT protocols are necessary where the depth-dependent temperatures are measured to estimate depth-specific thermal properties. Thus, a novel instrument with a data logger to automatically obtain the temperature measurements along the BHE is introduced. This device is based on a Zynq-7000 all programmable system on a chip. It has a dual-core central processing unit and a field-programmable gate array on one chip, thus providing a versatile architecture that reduces cost and improves efficiency in comparison with other systems of similar characteristics. This paper describes the implemented hardware and software developments that range from user interface application to a free-distribution operating system based on an embedded Linux. The proposed instrument can be easily incorporated throughout a TRT, and the nonspecialized staff can remotely manage or visualize the results through a menu-driven interface. The device is tested in a specific BHE installation and validated with standard Pt100-temperature-sensors. The results are comparable and, therefore, demonstrate the applicability of this novel instrument called Geowire.
View