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In this paper, we propose a method to design the pseudorandom number generator (PRNG) using three kinds of four-wing memristive hyperchaotic systems (FWMHSs) with different dimensions as multientropy sources. The principle of this method is to obtain pseudorandom numbers with good randomness by coupling XOR operation on the three kinds of FWMHSs wi...
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... The method consists of coupling XOR operation on three kinds of four-wing memristive hyperchaotic systems (FWMHSs) with different dimensions to obtain the PRND. In the encryption algorithm, the optimized Arnold matrix scrambling method and the diffusion processing based on XOR were used to get the encrypted image [30]. ...
Pseudorandom number generators (PRNGs) are an essential tool in cryptography; they produce secret keys to encrypt messages or mask the content by combining it with a random sequence. This study introduces an efficient pseudorandom number generator for a new cryptographic application. The PRNG structure comprises two chaotic digital IIR filters of the second and third order and a 4D hyperchaotic system. In this system, the first chaotic sequence is used as the input to the filters, and the second chaotic sequence is used to select the values of the pseudorandom sequence from the outputs of filters. The cryptosystem algorithm utilizes the pseudorandom sequence produced by the proposed PRNG to create a matrix mask and XOR it with a source image after being permuted with a new technique. The permutation method involves shuffling the positions of the original image using a matrix derived from two mathematical operations (modulo and division) and the final chaotic sequence. For heightened security, the shuffled image is subsequently divided into blocks and mixed using the third chaotic sequence. Statistical and frequency tests demonstrate that the proposed PRNG has strong randomness, high uncertainty, and an absence of discernible statistical patterns. Furthermore, simulation, experimental results, and performance analysis confirm that the new cryptosystem exhibits high security and resilience against various attacks, including differential and statistical attacks.
... If the quality of the generated random numbers is not good enough, attackers can compromise system security. To ensure the generated numbers are truly random and unpredictable, it is necessary to ensure that the length and period of the random number sequences are sufficient, as well as ensuring that their entropy values are high [5]. In simple terms, a number sequence is considered random if future values in the sequence cannot be predicted based on the existing sequence. ...
Paired neurons exhibit diverse dynamic behaviors, including chaotic patterns. This paper presents an FPGA-based implementation of a high-speed pseudo-random number generator using two coupled Izhikevich oscillators. The dynamical characteristics of the neuronal model are investigated via MATLAB-based simulations, while the proposed generator is effectively modeled and simulated utilizing the Xilinx system generator framework. The model is then synthesized using the Xilinx Synthesis Tool followed by its implementation on the evaluation board of the Xilinx Spartan-6 XC6SLX9 FPGA. A post-processing procedure incorporating the exclusive OR operation has been employed to enhance the randomness of the output bits. The proposed pseudo-random number generator has a lower implementation cost compared to similar works, while achieving a maximum frequency of 49.6 MHz and a bit generation rate of 28.4 Mbit/s. The quality of the generated bit sequences is evaluated through various statistical analyses, including the scale index method, autocorrelation test, information entropy analysis, and the NIST test suite. The tests result demonstrate that the numbers generated through the proposed method exhibit a high entropy value, non-periodic behavior, and a lack of correlation. The proposed random number generator has potential applications in security and encryption systems.
... In an ideal cryptographic system, the key space, which is higher than 128-bit in length, is considered insecure [47]. In our cryptographic system, we chose the key length as 512 bits. ...
... Information entropy is a calculation that shows system complexity. The calculation of the entropy value is shown in Equation 8 [47]. ...
Block encryption algorithms are among the most preferred applications in cryptographic systems. Block
ciphers should have accomplished some requirements for a secure communication system. They should be
evaluated in terms of cryptanalysis methods for widespread usage. The aim of this paper is to introduce a new
secure and fast block encryption algorithm for images. For this purpose, a new block cipher, which offers an
innovative encryption structure for key generation systems and can use S-boxes with different methods, is
proposed. A Dynamic S-Box is used in the algorithm for both substitution and key generation purposes. Linear
and differential cryptanalysis methods were performed successfully. UACI and NPCR tests show that the proposed
symmetric block cipher algorithm is compatible with image encryption systems. The 512-bit key length
provides the highest security for block encryption. Additionally, information entropy test, correlation coefficients,
mean-squared error, and peak signal-to-noise ratio analyses were concluded successfully. The novelty
of the paper is building a cryptanalysis attack-resistant block cipher algorithm that presents a lightweight
cryptographic solution for image encryption systems.
... However, any of the two channels can be chosen at random to perform the embedding process. One can use any efficient pseudorandom number generator [54][55][56] to make the random selection of two channels to employ embedding. ...
Everyday dealing with enormous amounts of sensitive data requires its protection and communication over the insecure network. The field of ‘Steganography’ always attracted researchers for significant amount of scientific attention to protect and communicate sensitive data. This paper presents a secure steganography scheme for hiding Gray-scale secret image into a Color cover image by replacing cover image bits in frequency domain using modified quantum substitution box (S-Box). The inclusion of modified quantum S-Box for concealing secret bits in randomly selected any of the two channels of cover image ensures enhanced security. In the proposed scheme, we first performed discrete cosine transform (DCT) on the cover image. Then, quantum S-box is applied to locate the position of DCT coefficients where least significant bits are substituted intelligently based on the relative ordering of DCT frequencies. This relative ordering is achieved by traversing DCT coefficients in a zigzag manner where less important pixels have been altered more effectively without any major loss in image quality. The security of proposed method is examined by key space, key sensitivity parameters and robustness analysis. Additionally, the conducted simulation results demonstrate that our proposed steganography scheme has better visual image quality in terms of MSE, PSNR, UQI, SSIM, RMSE parameters as compared to other state-of-the-art works.
... Since all p-values are greater than or equal to the significance level of α = 0.01, the sequence generated by the digital circuit passes these tests. The ENT test suite [37] is a tool that has been extensively used [38,39]. By running six different statistical tests, the tool provides a reliable measure of quality for compression algorithms, pseudo-random number generators for use in statistical sampling, and encryption applications. ...
Digital chaotic systems used in various applications such as signal processing, artificial intelligence, and communications often suffer from the issue of dynamical degradation. This paper proposes a solution to address this problem in the digital tent map. Our proposed method includes a simple and optimized hardware architecture, along with a hardware-efficient perturbation method, to create a high-performance computing system that retains its chaotic properties. We implemented our proposed architecture using an FPGA (Field-Programmable Gate Array) and the 1's complement fixed-point format. Our results demonstrate that the implemented digital circuit reduces logical resource consumption compared to state-of-the-art references and exhibits pseudo-random nature, as confirmed by various statistical tests. We validated our proposed pseudo-random number generator in a hardware architecture for particle swarm optimization, demonstrating its effectiveness.
... These clusters were then used as the secret key that they obtained from the optimized 5-D chaotic map. Lastly, the inverse was used to obtain the final encrypted image X. Chen et al. [19] studied a way to model the pseudo-random number generator by three types of four clusters of hyperchaotic systems, with different dimensions as multiple entropy bases. This model performed the replacement in a row and then joined the XOR operation on the three types of the proposed model with different dimensions to present complex encryption images. ...
With the rapid expansion of electronic data transmission, unauthorized data access is growing. Information security against unwanted access is becoming increasingly essential in data storage and data transfer. Images are a common type of information that is used in almost every aspect of life, so the security of image data against unwanted access is critical. In this article, we propose an encryption technique that uses a symmetric encryption method based on XOR operation between the plain image and another image that will be used as a key agreed upon by both the sender and recipient. To ensure the security of the plain images, the scheme performs pixel permutation procedures dynamically using random numbers on the key image and plain image in each encryption process, which renders the encryption algorithm strong and brute-force resistant. Simulation results on several standard images showed a random distribution of pixel values and a higher pass rate correlated with entropy and ideal values for analysis parameters. Thus, through the use of randomization, the proposed algorithm is resistant to various attacks and offers promising security measurements while maintaining efficient and fast execution.
... According to Eq. (19), the current flowing through the element P 1 is related with the terminal voltage across terminals A and B. ...
... According to the current following characteristics of AD844, the current flowing out from the z-terminal of U1 equals the current I 1 (s) in Eq. (19) flowing out from the x terminal of U1. If an equivalent FOC is connected to the z port of a AD844 with another port connected to ground, the voltage across the FOC can be obtained, and the expression of this voltage will contain the fractional-order integration of the current in Eq. (19). ...
... According to the current following characteristics of AD844, the current flowing out from the z-terminal of U1 equals the current I 1 (s) in Eq. (19) flowing out from the x terminal of U1. If an equivalent FOC is connected to the z port of a AD844 with another port connected to ground, the voltage across the FOC can be obtained, and the expression of this voltage will contain the fractional-order integration of the current in Eq. (19). As a result, the z-terminal of U1 is connected to an equivalent FOC. ...
Fractional-order systems generalize classical differential systems and have empirically shown to achieve fine-grain modeling of the temporal dynamics and frequency responses of certain real-world phenomena. Although the study of integer-order memory element (mem-element) emulators has persisted for several years, the study of fractional-order mem-elements has received little attention. To promote the study of the characteristics and applications of mem-element systems in fractional calculus and memory systems, a novel universal fractional-order mem-elements interface for constructing three types of fractional-order mem-element emulators is proposed in this paper. With the same circuit topology, the floating fractional-order memristor, the fractional-order memcapacitor, and fractional-order meminductor emulators can be implemented by simply combining the impedances of different passive elements. PSPICE circuit simulation and printed circuit board hardware experiments validate the dynamical behaviors and effectiveness of our proposed emulators. In addition, the dynamic relationship between fractional-order parameters and values of fractional-order impedance is explored in MATLAB simulation. The proposed fractional-order mem-element emulators built based on the universal interface are constructed with a small number of active and passive elements, which not only reduces the cost but also promotes the development of fractional-order mem-element emulators and application research for the future.
... In 2008, Hewlett Packard labs successfully fabricated a nanoscale solid-state device that was linked to the original postulation of the memristor (MR) by Chua in 1971[Strukov et al., 2008Chua, 1971]. Since then, MRs have attracted significant attention across academia and industry due to its potential as a highly compact nonvolatile memory and nonlinear characteristics, which are both well-suited for accelerating neural network workloads Xu et al., 2021a;Yang & Wang, 2021;Chen et al., 2020;Yu et al., 2021;Barraj et al., 2021;Dalgaty et al., 2021]. Subsequently, the theoretical notion of the MR was extended to capacitive and inductive systems, bringing about the conceptualization of the memcapacitor (MC) and meminductor (ML), respectively [Di Ventra et al., 2009]. ...
Memcapacitors (MCs) are promising candidates for the future design of low-power integrated neuromorphic computing systems, with particular emphasis on dynamical spiking neuron models that exhibit rich temporal behaviors. We present a novel floating flux-controlled MC that is designed using only three current feedback amplifiers, one analog multiplier, one capacitor and one resistor. Compared with existing floating MC emulators, our proposed design has a simpler structure without the need for DC biasing voltage sources, and can operate at higher working frequencies, and therefore enabling rapid prototyping of applied MC circuits for experimental verification of large-scale MC arrays. The consistency of the theoretical analysis, simulation and experimental results confirms the correctness and practicability of this new memcapacitor emulator. To further demonstrate a potential use of our MC, in this work, we apply the MC as the first parameterizable leaky integrator for spiking neuron through simulation and experiments. The intrinsic tunable capacitance of the MC can bring about novel short-term memory dynamics to neuronal circuits by dynamically modifying the membrane time constant on-the-fly, which ultimately resembles long-term potentiation, and can thus offer longer term memory.
Our results highlight the potential for integrating heterogeneous spiking neural networks with richer temporal dynamics that rely on MC-based circuits to further the capability of neuromorphic computing.
... It applies the theory of nonlinear dynamics to research the evolution of biological nervous systems over time and their dynamic properties, such as chaotic properties and firing behaviors. Chaos exists widely in variety of natural nonlinear systems, especially biological neural systems [50], which is a particular dynamical behavior [51]. Firing plays an important role in encoding and transmission of neural informations, and is one of the main electrical activities of biological neurons. ...
Since memristors can be used to describe electromagnetic induction effects, this paper proposes a novel 4-D Hindmarsh-Rose (HR) neuron model based on two flux-controlled memristors to show complex dynamics of neuronal electrical activity. It has no equilibrium point, revealing hidden dynamical behaviors. The complex dynamics of the system are illustrated by phase portraits, the time sequences, bifurcation diagrams, and Lyapunov exponents spectra. The presented 4-D HR neuron model can produce coexisting multiple hidden firing patterns, for instance, periodic spiking, chaotic spiking, transient chaotic spiking, periodic bursting, chaotic bursting, transient chaotic bursting, stochastic bursting, and transient stochastic bursting. Besides, rich nonlinear dynamics, such as anti-monotonicity and initial offset boosting, are also found. Finally, Multisim circuit simulation is performed and the results are in accordance with numerical simulation.
... Bilgi entropisi değeri özellikle görüntü şifreleme sistemleri için önemli bir parametre olarak görülmektedir. Aşağıdaki denklem yardımıyla bilgi entropisi değerini hesaplamak mümkündür [40]. Korelasyon katsayıları yine görüntü şifreleme sistemlerinde önemli bir parametredir. ...
Görüntü şifreleme sistemlerinin popülerliği gün geçtikçe katlanarak artmaktadır. Farklı algoritmalar ve farklı sistemler yardımıyla farklı farklı şifreleme sistemleri tasarlansa da literatürdeki ihtiyacın doldurulması mümkün olmamıştır. Hem görüntü üzerinden yapılan haberleşme işlemlerinin yaygınlaşması hem de görüntü iletiminde ihtiyaç duyulan mahremiyet ihtiyacının diğer veri türlerine göre daha yüksek olması sebebiyle yeni sistemlerin geliştirilmesi önem arz etmektedir. Yapılan bu çalışmada Trivium algoritması yardımıyla üretilen rastgele sayı dizileri öncelikle permutasyon oluşturularak piksel karıştırma işlemlerinde kullanılmıştır. Ayrıca üretilen bitler şifreleme işleminde kullanılmak için anahtar üretiminde kullanılmıştır. Üretilen bitlerin rastgelelik koşullarını sağlayıp sağlamadığı NIST testleri yardımıyla başarılı olarak sonuçlandırıldıktan sonra tasarlanan sistemin güvenlik analizleri farklı teknikler yardımıyla gerçekleştirilmiştir. Histogram analizi sonuçlarına göre sadece piksel karıştırma işlemiyle kriptolojik işlem yapan sistemlerin güvenlik açıkları gösterilmiştir. Tüm sistemin uygulanması durumunda başarılı bir görüntü şifreleme işleminin gerçekleştirilebileceği tespit edilmiştir.
