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Universal and fault-tolerant quantum computation is a promising new paradigm that may efficiently conquer difficult computation tasks beyond the reach of classical computation. It motivates the development of various quantum technologies. The rapid progress of quantum technologies accelerates the realization of quantum computers. In this paper, we...
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... abstraction stack of quantum computation is similar to that of classical computation as shown in Fig. 1. A more detailed and quantum-specific view on architecture is proposed in [7]. For quantum hardware, both general-purpose quantum processors, e.g., [8], and special-purpose quantum processors, e.g., [9], are under active development. The former follows the unitary-gate-based quantum circuit computation model [10], [11], and the latter ...
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... computation and quantum technologies from the design automation perspective. Due to the rapid progress and diversified interdisciplinary studies, it is not possible to mention all important related work of the intended subject. However, we tried to provide a skeleton of some key elements in the abstraction stack of quantum computation sketched in Fig. 1 based on our limited knowledge. We hope this survey can serve as a helpful guide for the readers to find entry points for further ...
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... The connectivity of NISQ architecture restricts a two-qubit gate to adjacent qubits, while various noise sources impact the reliability of quantum computations. An optimal solution to quantum circuit routing minimizes the resource overhead and maximizes the success probability of running a NISQ-executable circuit [17,45,46]. ...
... For brevity, we write F avg (E ′ ) for F avg (E ′ , I). [32,50] provide an alternative expression for the average gate fidelity, as shown in Equation (17). F pro (E ′ , I) is called the process fidelity (a.k.a., the entanglement fidelity) and it gauges the overlap between ρ before and after the application of E ′ . ...
... Edge Weight (0, 1) 0.009690 (1,2) 0.015158 (1,4) 0.007311 (2,3) 0.013654 (3,5) 0.012821 (4,7) 0.011911 (5,8) 0.008868 (6,7) 0.006946 (7,10) 0.006762 (8,9) 0.012718 (8,11) 0.009196 (10, 12) 0.019895 (11,14) 0.010583 (12,13) (3,5) 0.005375 (16,19) 0.007042 (4,7) 0.016432 (17,18) 0.009230 (5,8) 0.004620 (18,21) 0.005924 (6,7) 0.014319 (19,20) 0.007014 (7,10) 0.022012 (19,22) 0.005040 (8,9) 0.006167 (21, 23) 0.008903 (8,11) 0.053568 (22,25) 0.023629 (10, 12) 0.006628 (23,24) 0.003967 (11,14) 0.013671 (24,25) Figure 26: On IBM's fake Guadalupe backend, compare the three cost functions against the error probability of a synthesized CNOT circuit. p i is the error rate of a noisy CNOT gate, n is the circuit width, α = 1 + 2 n−2 −1 2 n +1 . ...
We introduce an improved CNOT synthesis algorithm that considers nearest-neighbour interactions and CNOT gate error rates in noisy intermediate-scale quantum (NISQ) hardware. Compared to IBM's Qiskit compiler, it improves the fidelity of a synthesized CNOT circuit by about 2 times on average (up to 9 times). It lowers the synthesized CNOT count by a factor of 13 on average (up to a factor of 162). Our contribution is twofold. First, we define a $\textsf{Cost}$ function by approximating the average gate fidelity $F_{avg}$. According to the simulation results, $\textsf{Cost}$ fits the error probability of a noisy CNOT circuit, $\textsf{Prob} = 1 - F_{avg}$, much tighter than the commonly used cost functions. On IBM's fake Nairobi backend, it matches $\textsf{Prob}$ to within $10^{-3}$. On other backends, it fits $\textsf{Prob}$ to within $10^{-1}$. $\textsf{Cost}$ accurately quantifies the dynamic error characteristics and shows remarkable scalability. Second, we propose a noise-aware CNOT routing algorithm, NAPermRowCol, by adapting the leading Steiner-tree-based connectivity-aware CNOT synthesis algorithms. A weighted edge is used to encode a CNOT gate error rate and $\textsf{Cost}$-instructed heuristics are applied to each reduction step. NAPermRowCol does not use ancillary qubits and is not restricted to certain initial qubit maps. Compared with algorithms that are noise-agnostic, it improves the fidelity of a synthesized CNOT circuit across varied NISQ hardware. Depending on the benchmark circuit and the IBM backend selected, it lowers the synthesized CNOT count up to $56.95\%$ compared to ROWCOL and up to $21.62\%$ compared to PermRowCol. It reduces the synthesis $\textsf{Cost}$ up to $25.71\%$ compared to ROWCOL and up to $9.12\%$ compared to PermRowCol. Our method can be extended to route a more general quantum circuit, giving a powerful new tool for compiling on NISQ devices.
... II. BACKGROUND & RELATED WORK NISQ-era devices are highly affected by noise [2] [3]. Moreover, it has been shown by [4] that each IBM quantum computer exhibits a time dependant noise fingerprint so distinct it can be learnt. ...
In order to enter the era of utility, noisy intermediate-scale quantum (NISQ) devices need to enable long-range entanglement of large qubit chains. However, due to the limited connectivity of superconducting NISQ devices, long-range entangling gates are realized in linear depth. Furthermore, a time-dependent degradation of the average CNOT gate fidelity is observed. Likely due to aging, this phenomenon further degrades entanglement capabilities. Our aim is to help in the current efforts to achieve utility and provide an opportunity to extend the utility lifespan of current devices-albeit by selecting fewer, high quality resources. To achieve this, we provide a method to transform user-provided CNOT and readout error requirements into a compliant partition onto which circuits can be executed. We demonstrate an improvement of up to 52% in fidelity for a random CNOT chain of length 50 qubits and consistent improvements between 11.8% and 47.7% for chains between 10 and 40 in varying in increments of 10, respectively.
... Surveying available quantum software is a task beyond the scope of this paper, so we leave that to well-developed work such as Refs. [78] and [23], as well as additional works such as Refs. [86,100,103]. ...
The quantum computer has become contemporary reality, with the first two-qubit machine of mere decades ago transforming into cloud-accessible devices with tens, hundreds, or--in a few cases--even thousands of qubits. While such hardware is noisy and still relatively small, the increasing number of operable qubits raises another challenge: how to develop the now-sizeable quantum circuits executable on these machines. Preparing circuits manually for specifications of any meaningful size is at best tedious and at worst impossible, creating a need for automation. This article describes an automated quantum-software toolkit for synthesis, compilation, and optimization, which transforms classically-specified, irreversible functions to both technology-independent and technology-dependent quantum circuits. We also describe and analyze the toolkit's application to three situations--quantum read-only memories, quantum random number generators, and quantum oracles--and illustrate the toolkit's start-to-finish features from the input of classical functions to the output of quantum circuits ready-to-run on commercial hardware. Furthermore, we illustrate how the toolkit enables research beyond circuit synthesis, including comparison of synthesis and optimization methods and deeper understanding of even well-studied quantum algorithms. As quantum hardware continues to develop, such quantum circuit toolkits will play a critical role in realizing its potential.
... Quantum computers operate at exceedingly low temperatures to reduce the entropy of quantum components. Quantum distortion, on the opposite side, is combated by the employment of fault-tolerant systems, such as those that utilize surface codes, concatenated codes, and bosonic qubits (De Micheli et al., 2022). In error codes, for example, information is dispersed among many physical qubits that comprise a logical qubit. ...
With advancements of cloud technologies Multi-Access Edge Computing (MEC) emerged as a remarkable edge-cloud technology to provide computing facilities to resource-restrained edge user devices. Utilizing the features of MEC user devices can obtain computational services from the network edge which drastically reduces the transmission latency of evolving low-latency applications such as video analytics, e-healthcare, etc. The objective of the work is to perform a thorough survey of the recent advances relative to the MEC paradigm. In this context, the work overviewed the fundamentals, architecture, state-of-the-art enabling technologies, evolving supporting/assistive technologies, deployment scenarios, security issues, and solutions relative to the MEC technology. The work, moreover, stated the relative challenges and future directions to further improve the features of MEC.
