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A model of the memory hierarchy, as described in (Goto and Geijn, 2008). 

A model of the memory hierarchy, as described in (Goto and Geijn, 2008). 

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Article
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Modern astronomical data processing requires complex software pipelines to process ever growing datasets. For radio astronomy, these pipelines have become so large that they need to be distributed across a computational cluster. This makes it difficult to monitor the performance of each pipeline step. To gain insight into the performance of each st...

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Context 1
... system parameters studied here are the CPU speed, memory throughput, cache size and disk speed. Modern computers can have a complex memory hierarchy as demonstrated in Figure 6 ( Katz and Patterson, 2001). This is due to the cost trade-off between memory size and memory speed. Because of this trade-off, the full dataset is stored on disk, while the working set is placed in RAM. This is the data that the processor needs to access at the current time (Denning, 1968). The most frequently ac- cessed parts of the data are stored in the CPU cache, which evicts the oldest data when full ( Hazelwood and Smith, 2004). The CPU processing speed is faster than the RAM la- tency, so a hierarchy of caches exist. Caches store small subsets of the working set and have a fast connection to the processor. The fastest data link is between the CPU and the L1 Cache, with the link to RAM being slower and the disk read speed slower still. The limited memory capac- ity of the different levels of the memory hierarchy as well as the throughput between them will lead to performance bottlenecks. These bottlenecks will lead to the processor waiting on memory. Such stalls lead to longer processing times. ...
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... slowest processing steps for the prefactor pipeline were identified as the calib cal and gsmcal solve steps. While the data can fit into the RAM for all of the pro- cessing machines, it is much larger than the processor's internal cache ( Figure 6). The discoveries made concerned the memory hierarchy in Figure 6. Results labeled R2, R8 and R9 related to the CPU performance; R2, R6 and R7 related to the Cache performance; R3 and R5 related to the Memory usage and R4 discussed the Disk ...
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... slowest processing steps for the prefactor pipeline were identified as the calib cal and gsmcal solve steps. While the data can fit into the RAM for all of the pro- cessing machines, it is much larger than the processor's internal cache ( Figure 6). The discoveries made concerned the memory hierarchy in Figure 6. Results labeled R2, R8 and R9 related to the CPU performance; R2, R6 and R7 related to the Cache performance; R3 and R5 related to the Memory usage and R4 discussed the Disk ...
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... CPU has a hierarchy of caches consisting of Level 1, Level 2 Cache and LLC Cache. For the four processors tested, the Level 1 and 2 caches were all the same size, thus the only difference is the Last Level Cache (LLC or just Cache in Figure 6). This cache stores data needed by the CPU, so the larger it is, the less the processor needs to wait for RAM to return ...
Context 5
... system parameters studied here are the CPU speed, memory throughput, cache size and disk speed. Modern computers can have a complex memory hierarchy as demonstrated in Figure 6 ( Katz and Patterson, 2001). This is due to the cost trade-off between memory size and memory speed. ...
Context 6
... CPU has a hierarchy of caches consisting of Level 1, Level 2 Cache and LLC Cache. For the four processors tested, the Level 1 and 2 caches were all the same size, thus the only difference is the Last Level Cache (LLC or just Cache in Figure 6). This cache stores data needed by the CPU, so the larger it is, the less the processor needs to wait for RAM to return data. ...
Context 7
... slowest processing steps for the prefactor pipeline were identified as the calib cal and gsmcal solve steps. While the data can fit into the RAM for all of the processing machines, it is much larger than the processor's internal cache ( Figure 6). The discoveries made concerned the memory hierarchy in Figure 6. ...
Context 8
... the data can fit into the RAM for all of the processing machines, it is much larger than the processor's internal cache ( Figure 6). The discoveries made concerned the memory hierarchy in Figure 6. Results labeled R2, R8 and R9 related to the CPU performance; R2, R6 and R7 related to the Cache performance; R3 and R5 related to the Memory usage and R4 discussed the Disk speed. ...

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