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6T-SRAM with pre-charge circuit.

6T-SRAM with pre-charge circuit.

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Fig. 1. 6T-SRAM cell with back-bias circuit
Fig. 2. The resistive defects considered in this study.
Fig. 3. 6T-SRAM with pre-charge circuit.
Effectiveness of the different test methods with respect to the
Comparing different solutions for testing resistive defects in low-power SRAMs
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  • Dec 2021
Low-power SRAM architectures are especially sensitive to many types of defects that may occur during manufacturing. Among these, resistive defects can appear. This paper analyzes some types of such defects that may impair the device functionalities in subtle ways, depending on the defect characteristics, and that may not be directly or easily detec...
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... section presents the experimental results based on the simulation of a 6T SRAM cell in a 160nm STMicroelectronics technology, addressing the defects discussed in the previous sections. For our purpose we used Cadence Virtuoso for the schematics and ELDO simulator for simulations and analysis. Fig. 3 shows a complete low-power SRAM sub-system featuring all the components of a single cell that we used for our simulations. This system is made up of three main ...